RGB888输入,输出4对LVDS(3对LVDS data +1 对clock),有没参考的原理图?
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FPD linkI一般是3 or 4 data+1 clock,如果是3对LVDS data +1 对clock,那么一般输入为21bit,比如DS90CD215,4对LVDS data +1 对clock一般是28bit(RGB888加上一些控制信号),比如DS90C385,DS90CR285等。