Part Number: AFE58JD48
We now tring AFE58JD48 in x80 mode with less highspeed GT link to xilinx FPGA xku5p devices,but the jesd204b link sometimes not bringup,so i using xilinx tools to scope the jesd204b phy output dat.I find that AFE58JD48 send jesd204b initial lane alignment mutiframes (ILA), it loss half a mutiframe length sometimes
please see in the picture 1 or loss_half_mutif_ila .And when it can bringup jesd204b links,i can get adc data. I capture the dat seems only 2 mutiframes not the jesd204 protocol gives 4 mutiframes,please see picture 2 or loss_2integer_multif.ila. Whats happen in my board!??
