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DAC63004: 请问有DAC63004或相同接口DAC芯片的I2C底层驱动demo吗

Part Number: DAC63004

在开发新项目,使用这款芯片,希望能寻找到底层驱动demo,谢谢~

  • 那有没有这个DAC60034设备的.h头文件提供呢? 类似这个帖子e2echina.ti.com/.../

  • 很抱歉没有,如果您在应用I2C时,哪里有疑问您可以回帖说明,我会尽量帮您解释清楚

  • 您好,I2C驱动已经调成成功了。想请教另一个问题,如果DAC60034芯片使用3.3V供电,使用内部基准(1.21V),电压输出模式,增益设置为3x,那么DAC芯片的通道能输出高于3.3V的电压吗?  因为1.21 * 3 = 3.63,输出范围是0~3.63V吗

  • 很抱歉回复这么晚!

    很高兴您的I2C驱动已经调成成功!

    不能高于3.3V,如下电气特性截图,在使用内部基准电压且空载下,输出电压距离VDD 0.2V,即最大输出VDD-0.2V=3.3V-0.2V=3.1V。根据经验随着输出负载电流的增大,输出电压还会继续减小。

  • 谢谢,自己写的DAC60034设备的.h头文件共享

    #ifndef __DAC60034_H
    #define __DAC60034_H
    
    
    //#include <stdint.h>	   
    #include "stm32f10x.h"
    //#include "bitband.h"
    
    
    #define DAC_CH0  0
    #define DAC_CH1  1
    #define DAC_CH2  2
    #define DAC_CH3  3
    
    //**********************************************************************************
    //
    // Device commands
    //
    //**********************************************************************************
    
    #define DAC_IO_PORT      GPIOB
    #define DAC_IO_RCC       RCC_APB2Periph_GPIOB
    
    #define DAC_IO_SCL       GPIO_Pin_6
    #define DAC_IO_SDA       GPIO_Pin_7
    
    #define DAC_SDA_H        GPIO_SetBits(DAC_IO_PORT, DAC_IO_SDA)
    #define DAC_SDA_L        GPIO_ResetBits(DAC_IO_PORT, DAC_IO_SDA)
    
    #define DAC_SCL_H        GPIO_SetBits(DAC_IO_PORT, DAC_IO_SCL)
    #define DAC_SCL_L        GPIO_ResetBits(DAC_IO_PORT, DAC_IO_SCL)
    
    
    #define I2C_SDA_READ()        ((DAC_IO_PORT->IDR & DAC_IO_SDA) != 0)	/* 读SDA口线状态 */ //GPIO_ReadInputDataBit(DAC_IO_PORT, DAC_IO_SDA)
    #define I2C_SCL_READ()        ((DAC_IO_PORT->IDR & DAC_IO_SCL) != 0)	/* 读SCL口线状态 */ //GPIO_ReadInputDataBit(DAC_IO_PORT, DAC_IO_SCL)
    
    
    #define DEV_ADDR    0x92
    #define DEV_ADDR_BRD    0x9E
    #define DEV_ADDR_EVM    0x92
    
    
    #define I2C_WR	0		/* 写控制bit */
    #define I2C_RD	1		/* 读控制bit */
    
     
    
    //**********************************************************************************
    //
    // Function prototypes
    //
    //**********************************************************************************
    
    
    //IIC所有操作函数
    void DAC_IIC_Init(void);                //初始化IIC的IO口				 
    void DAC_IIC_Start(void);				//发送IIC开始信号
    void DAC_IIC_Stop(void);	  			//发送IIC停止信号
    void IIC_Send_Byte(u8 txd);			//IIC发送一个字节
    u8 IIC_Read_Byte(void);//IIC读取一个字节
    u8 IIC_Wait_Ack(void); 				//IIC等待ACK信号
    void IIC_Ack(void);					//IIC发送ACK信号
    void IIC_NAck(void);				//IIC不发送ACK信号
     
    void I2C_WriteByte(uint8_t addr,uint16_t data);
    uint16_t I2C_ReadByte(uint8_t addr);  //读寄存器或读数据  
    
    uint8_t i2c_CheckDevice(uint8_t _Address);
    void DAC60034_Initial(void);
    uint8_t DAC60034_Output(uint8_t chn, uint16_t mv);
    //void delay_ms(u32 nms)  ;
    
    
    
    
    //**********************************************************************************
    //
    // Register definitions
    //
    //**********************************************************************************
    
    
    /* Register 0x00 (NOP) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                  |                  |                  |                  |                  |                  |                  |                  |                  |                  |                  |                  |                  |                  |                  |   NO OPERATION   |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* NOP register address */
    #define NOP_ADDRESS													((uint8_t) 0x00)
    
    /* NOOP default (reset) value */
    #define NOOP_DEFAULT													((uint16_t) 0x0000)
    
    
    
    
    /* Register 0x01/0x07/0x0D/0x13 (DAC-X-MARGIN-HIGH) definition DAC 输出的裕度高代码
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                                                                          DAC-X-MARGIN-HIGH[11:0]                                                                                                  |         x        |         x        |         x        |         x        |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* DAC-X-MARGIN-HIGH register address */
    #define DAC_0_MARGIN_HIGH_ADDRESS													((uint8_t) 0x01)
    /* DAC-X-MARGIN-HIGH register address */
    #define DAC_1_MARGIN_HIGH_ADDRESS													((uint8_t) 0x07)
    /* DAC-X-MARGIN-HIGH register address */
    #define DAC_2_MARGIN_HIGH_ADDRESS													((uint8_t) 0x0D)
    /* DAC-X-MARGIN-HIGH register address */
    #define DAC_3_MARGIN_HIGH_ADDRESS													((uint8_t) 0x13)
    
    
    /* DAC-X-MARGIN-HIGH  default (reset) value */
    #define DAC_X_MARGIN_HIGH_DEFAULT													((uint16_t) 0x0000)
    
    /* DAC-X-MARGIN-HIGH  register field masks */
    #define DAC_X_MARGIN_HIGH_MASK											((uint16_t) 0xFFF0)
    
    
    
    /* Register 0x02/0x08/0x0E/0x14 (DAC-X-MARGIN-LOW) definition DAC 输出的裕度低代码
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                                                                          DAC-X-MARGIN-LOW[11:0]                                                                                                  |         x        |         x        |         x        |         x        |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* DAC-0-MARGIN-LOW register address */
    #define DAC_0_MARGIN_LOW_ADDRESS													((uint8_t) 0x02)
    /* DAC-1-MARGIN-LOW register address */
    #define DAC_1_MARGIN_LOW_ADDRESS													((uint8_t) 0x08)
    /* DAC-2-MARGIN-LOW register address */
    #define DAC_2_MARGIN_LOW_ADDRESS													((uint8_t) 0x0E)
    /* DAC-3-MARGIN-LOW register address */
    #define DAC_3_MARGIN_LOW_ADDRESS													((uint8_t) 0x14)
    
    
    /* DAC-X-MARGIN-LOW default (reset) value */
    #define DAC_X_MARGIN_LOW_DEFAULT													((uint16_t) 0x0000)
    
    /* DAC-X-MARGIN-LOW register field masks */
    #define DAC_X_MARGIN_LOW_MASK										        	((uint16_t) 0xFFF0)
    
    
    
    /* Register 0x03 /0x09/0x0F/0x15 ( DAC-X-VOUT-CMP-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |         0        |         0        |         0        |                      VOUT-GAIN-X[2:0]                  |         0        |         0        |         0        |         0        |         0        |    CMP-X-OD-EN   |    CMP-X-OUT-EN  | CMP-X-HIZ-IN-DIS |    CMP-X-INV-EN  |     CMP-X-EN     |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /*  DAC-0-VOUT-CMP-CONFIG register address */
    #define  DAC_0_VOUT_CMP_CONFIG_ADDRESS										((uint8_t) 0x03)
    /*  DAC-1-VOUT-CMP-CONFIG register address */
    #define  DAC_1_VOUT_CMP_CONFIG_ADDRESS										((uint8_t) 0x09)
    /*  DAC-2-VOUT-CMP-CONFIG register address */
    #define  DAC_2_VOUT_CMP_CONFIG_ADDRESS										((uint8_t) 0x0F)
    /*  DAC-3-VOUT-CMP-CONFIG register address */
    #define  DAC_3_VOUT_CMP_CONFIG_ADDRESS										((uint8_t) 0x15)
    
    /*  DAC-X-VOUT-CMP-CONFIG default (reset) value */
    #define DAC_X_VOUT_CMP_CONFIG_DEFAULT													((uint16_t) 0x0000)
    
    /*  DAC-X-VOUT-CMP-CONFIG register field masks */
    #define VOUT_GAIN_1x_VREF											    ((uint16_t) 0x0000)
    #define VOUT_GAIN_1x_VDD											    ((uint16_t) 0x0400)
    #define VOUT_GAIN_1_5x_INREF											((uint16_t) 0x0800)
    #define VOUT_GAIN_2x_INREF											  ((uint16_t) 0x0C00)
    #define VOUT_GAIN_3x_INREF											  ((uint16_t) 0x1000)
    #define VOUT_GAIN_4x_INREF											  ((uint16_t) 0x1400)
    
    #define CMP_X_OD_DEN					    					      ((uint16_t) 0x0000)
    #define CMP_X_OD_EN					    					        ((uint16_t) 0x0010)
    
    #define CMP_X_OUT_DEN					    					      ((uint16_t) 0x0000)
    #define CMP_X_OUT_EN					    					      ((uint16_t) 0x0008)
    
    #define CMP_X_HIZ_IN					    					      ((uint16_t) 0x0000)
    #define CMP_X_HIZ_IN_DIS					    					  ((uint16_t) 0x0004)
    
    #define CMP_X_INV_DEN					    					      ((uint16_t) 0x0000)
    #define CMP_X_INV_EN					    					      ((uint16_t) 0x0002)
    
    #define CMP_X_DEN					    					          ((uint16_t) 0x0000)
    #define CMP_X_EN					    					          ((uint16_t) 0x0001)
    
    
    
    
    /* Register 0x04 /0x0A/0x10/0x16 (DAC-X-IOUT-MISC-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |         0        |         0        |         0        |                               IOUT-RANGE-X[3:0]                           |         0        |         0        |         0        |         0        |         0        |         0        |         0        |         0        |         0        |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /*  DAC-0-IOUT-MISC-CONFIG register address */
    #define  DAC_0_IOUT_MISC_CONFIG_ADDRESS										((uint8_t) 0x04)
    /*  DAC-1-IOUT-MISC-CONFIG register address */
    #define  DAC_1_IOUT_MISC_CONFIG_ADDRESS										((uint8_t) 0x0A)
    /*  DAC-2-IOUT-MISC-CONFIG register address */
    #define  DAC_2_IOUT_MISC_CONFIG_ADDRESS										((uint8_t) 0x10)
    /*  DAC-3-IOUT-MISC-CONFIG register address */
    #define  DAC_3_IOUT_MISC_CONFIG_ADDRESS										((uint8_t) 0x16)
    
    
    /*  DAC-X-IOUT-MISC-CONFIG default (reset) value */
    #define DAC_X_IOUT_MISC_CONFIG_DEFAULT							 		((uint16_t) 0x0000)
    
    /*  DAC-X-IOUT-MISC-CONFIG register field masks */
    #define IOUT_RANGE_0_25uA											    ((uint16_t) 0x0000)
    #define IOUT_RANGE_0_50uA											    ((uint16_t) 0x0200)
    #define IOUT_RANGE_0_125uA											  ((uint16_t) 0x0400)
    #define IOUT_RANGE_0_250uA											  ((uint16_t) 0x0600)
    #define IOUT_RANGE_0_n24uA											  ((uint16_t) 0x0800)
    #define IOUT_RANGE_0_n48uA											  ((uint16_t) 0x0A00)
    #define IOUT_RANGE_0_n120uA											  ((uint16_t) 0x0C00)
    #define IOUT_RANGE_0_n240uA											  ((uint16_t) 0x0E00)
    #define IOUT_RANGE_n25_25uA											  ((uint16_t) 0x1000)
    #define IOUT_RANGE_n50_50uA											  ((uint16_t) 0x1200)
    #define IOUT_RANGE_n125_125uA									    ((uint16_t) 0x1400)
    #define IOUT_RANGE_n250_250uA										  ((uint16_t) 0x1600)
    
    
    
    
    /* Register 0x05 /0x0B/0x11/0x17 (DAC-X-CMP-MODE-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |         0        |         0        |         0        |         0        |            CMP-X-MODE[1:0]          |         0        |         0        |         0        |         0        |         0        |         0        |         0        |         0        |         0        |         0        |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /*  DAC-0-CMP-MODE-CONFIG register address */
    #define  DAC_0_CMP_MODE_CONFIG_ADDRESS										((uint8_t) 0x05)
    /*  DAC-1-CMP-MODE-CONFIG register address */
    #define  DAC_1_CMP_MODE_CONFIG_ADDRESS										((uint8_t) 0x0B)
    /*  DAC-2-CMP-MODE-CONFIG register address */
    #define  DAC_2_CMP_MODE_CONFIG_ADDRESS										((uint8_t) 0x11)
    /*  DAC-3-CMP-MODE-CONFIG register address */
    #define  DAC_3_CMP_MODE_CONFIG_ADDRESS										((uint8_t) 0x17)
    
    
    /*  DAC-X-IOUT-MISC-CONFIG default (reset) value */
    #define DAC_X_CMP_MODE_CONFIG_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /*  DAC-X-IOUT-MISC-CONFIG register field masks */
    #define CMP_X_MODE_NODELAY_NOWINDOW										    ((uint16_t) 0x0000)
    #define CMP_X_MODE_DELAY										              ((uint16_t) 0x0400)
    #define CMP_X_MODE_WINDOW											            ((uint16_t) 0x0800)
    
    
    
    
    /* Register 0x06 /0x0C/0x12/0x18 (DAC-X-FUNC-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |     CLR-SEL-X    |   SYNC-CONFIG-X  |   BRD-CONFIG-X   |             PHASE-SEL-X[1:0]        |                      FUNC-CONFIG-X[2:0]                |  LOG-SLEW-EN-X   |                       CODE-STEP-X[2:0]                 |                               SLEW-RATE-X[3:0]                            |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /*  DAC-0-FUNC-CONFIG register address */
    #define  DAC_0_FUNC_CONFIG_ADDRESS										((uint8_t) 0x06)
    /*  DAC-1-FUNC-CONFIG register address */
    #define  DAC_1_FUNC_CONFIG_ADDRESS										((uint8_t) 0x0C)
    /*  DAC-2-FUNC-CONFIG register address */
    #define  DAC_2_FUNC_CONFIG_ADDRESS										((uint8_t) 0x12)
    /*  DAC-3-FUNC-CONFIG register address */
    #define  DAC_3_FUNC_CONFIG_ADDRESS										((uint8_t) 0x18)
    
    /*  DAC-X-FUNC-CONFIG default (reset) value */
    #define DAC_X_FUNC_CONFIG_DEFAULT							    		((uint16_t) 0x0000)
    
    /*  DAC-X-FUNC-CONFIG register field masks */
    #define CLR_SEL_X_ZERO        									      ((uint16_t) 0x0000)
    #define CLR_SEL_X_MIDDLE        									    ((uint16_t) 0x8000)
    
    #define SYNC_CONFIG_X_FAST										        ((uint16_t) 0x0000)
    #define SYNC_CONFIG_X_SLOW											      ((uint16_t) 0x4000)
    
    #define BRD_CONFIG_X_DEN										          ((uint16_t) 0x0000)
    #define BRD_CONFIG_X_EN										            ((uint16_t) 0x2000)
    
    #define PHASE_SEL_X_0										            ((uint16_t) 0x0000)
    #define PHASE_SEL_X_120										          ((uint16_t) 0x0800)
    #define PHASE_SEL_X_240										          ((uint16_t) 0x1000)
    #define PHASE_SEL_X_90										          ((uint16_t) 0x1800)
    
    #define FUNC_CONFIG_X_TRIANGLE										    ((uint16_t) 0x0000)
    #define FUNC_CONFIG_X_SAWTOOTH										    ((uint16_t) 0x0100)
    #define FUNC_CONFIG_X_ANTI_TRIANGLE										((uint16_t) 0x0200)
    #define FUNC_CONFIG_X_SINE										        ((uint16_t) 0x0400)
    #define FUNC_CONFIG_X_DISABLE										      ((uint16_t) 0x0700)
    
    //线性模式start
    #define LOG_SLEW_EN_X_LINEAR                             ((uint16_t) 0x0000)
    
    #define CODE_STEP_X_1LSB                           ((uint16_t) 0x0000)
    #define CODE_STEP_X_2LSB                           ((uint16_t) 0x0010)
    #define CODE_STEP_X_3LSB                           ((uint16_t) 0x0020)
    #define CODE_STEP_X_4LSB                           ((uint16_t) 0x0030)
    #define CODE_STEP_X_6LSB                           ((uint16_t) 0x0040)
    #define CODE_STEP_X_8LSB                           ((uint16_t) 0x0050)
    #define CODE_STEP_X_16LSB                          ((uint16_t) 0x0060)
    #define CODE_STEP_X_32LSB                          ((uint16_t) 0x0070)
    
    #define SLEW_RATE_X_NONE                                 ((uint16_t) 0x0000)
    #define SLEW_RATE_X_4US                                  ((uint16_t) 0x0001)
    #define SLEW_RATE_X_8US                                  ((uint16_t) 0x0002)
    #define SLEW_RATE_X_12US                                 ((uint16_t) 0x0003)
    #define SLEW_RATE_X_18US                                 ((uint16_t) 0x0004)
    #define SLEW_RATE_X_27_04US                              ((uint16_t) 0x0005)
    #define SLEW_RATE_X_40_48US                              ((uint16_t) 0x0006)
    #define SLEW_RATE_X_60_72US                              ((uint16_t) 0x0007)
    #define SLEW_RATE_X_91_12US                              ((uint16_t) 0x0008)
    #define SLEW_RATE_X_136_72US                             ((uint16_t) 0x0009)
    #define SLEW_RATE_X_239_2US                              ((uint16_t) 0x000A)
    #define SLEW_RATE_X_418_64US                             ((uint16_t) 0x000B)
    #define SLEW_RATE_X_732_56US                             ((uint16_t) 0x000C)
    #define SLEW_RATE_X_1282US                               ((uint16_t) 0x000D)
    #define SLEW_RATE_X_2563_96US                            ((uint16_t) 0x000E)
    #define SLEW_RATE_X_5127_92US                            ((uint16_t) 0x000F)
    //线性模式end
    
    //对数模式start
    #define LOG_SLEW_EN_X_LOG                             ((uint16_t) 0x0080)
    //……略
    //……略
    //……略
    //对数模式end
    
    
    
    
    
    /* Register 0x19/0x1A/0x1B/0x1C (DAC-X-DATA) definition DAC 
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                                                                           DAC-X-DATA[11:0]                                                                                                        |         x        |         x        |         x        |         x        |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
     
    /*  DAC-0-DATA register address */
    #define  DAC_0_DATA_ADDRESS										((uint8_t) 0x19)
    /*  DAC-1-DATA register address */
    #define  DAC_1_DATA_ADDRESS										((uint8_t) 0x1A)
    /*  DAC-2-DATA register address */
    #define  DAC_2_DATA_ADDRESS										((uint8_t) 0x1B)
    /*  DAC-3-DATA register address */
    #define  DAC_3_DATA_ADDRESS										((uint8_t) 0x1C)
    
    
    /*  DAC-X-DATA default (reset) value */
    #define DAC_X_DATA_DEFAULT			      	     ((uint16_t) 0x0000)
    
    
    
    
    /* Register 0x1F (COMMON-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |   WIN-LATCH-EN   |      DEV-LOCK    |   EE-READ-ADDR   |    EN-INT-REF    |              VOUT-PDN-3             |    IOUT-PDN-3    |            VOUT-PDN-2               |    IOUT-PDN-2    |            VOUT-PDN-1               |    IOUT-PDN-1    |            VOUT-PDN-0               |    IOUT-PDN-0    |                            
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /*  COMMON-CONFIG register address */
    #define  COMMON_CONFIG_ADDRESS										((uint8_t) 0x1F)
    
    
    /*  COMMON-CONFIG default (reset) value */
    #define COMMON_CONFIG_DEFAULT							    		((uint16_t) 0x0FFF)
    
    
    /*   COMMON-CONFIG register field masks */
    #define WIN_LATCH_DEN         									      ((uint16_t) 0x0000)
    #define WIN_LATCH_EN         								   	      ((uint16_t) 0x8000)
    
    #define DEV_NOT_LOCK         									      ((uint16_t) 0x0000)
    #define DEV_LOCK         								   	      ((uint16_t) 0x4000)
    
    #define EE_READ_ADDR_00         									      ((uint16_t) 0x0000)
    #define EE_READ_ADDR_01        								   	      ((uint16_t) 0x2000)
    
    #define EN_INT_REF_DEN         									      ((uint16_t) 0x0000)
    #define EN_INT_REF_EN        								   	      ((uint16_t) 0x1000)
    
    #define VOUT_PDN_3_PWR_ON         									      ((uint16_t) 0x0000)
    #define VOUT_PDN_3_10K_GND        								   	    ((uint16_t) 0x0400)
    #define VOUT_PDN_3_100K_GND         									      ((uint16_t) 0x0800)
    #define VOUT_PDN_3_HZ_GND        								   	    ((uint16_t) 0x0C00)
    
    #define IOUT_PDN_3_PWR_ON                                 ((uint16_t) 0x0000)
    #define IOUT_PDN_3_PWR_OFF                                ((uint16_t) 0x0200)
    
    #define VOUT_PDN_2_PWR_ON         									      ((uint16_t) 0x0000)
    #define VOUT_PDN_2_10K_GND        								   	    ((uint16_t) 0x0080)
    #define VOUT_PDN_2_100K_GND         									      ((uint16_t) 0x0100)
    #define VOUT_PDN_2_HZ_GND        								   	    ((uint16_t) 0x0180)
    
    #define IOUT_PDN_2_PWR_ON                                 ((uint16_t) 0x0000)
    #define IOUT_PDN_2_PWR_OFF                                ((uint16_t) 0x0040)
    
    #define VOUT_PDN_1_PWR_ON         									      ((uint16_t) 0x0000)
    #define VOUT_PDN_1_10K_GND        								   	    ((uint16_t) 0x0010)
    #define VOUT_PDN_1_100K_GND         									      ((uint16_t) 0x0020)
    #define VOUT_PDN_1_HZ_GND        								     	    ((uint16_t) 0x0030)
    
    #define IOUT_PDN_1_PWR_ON                                 ((uint16_t) 0x0000)
    #define IOUT_PDN_1_PWR_OFF                                ((uint16_t) 0x0008)
    
    #define VOUT_PDN_0_PWR_ON         									      ((uint16_t) 0x0000)
    #define VOUT_PDN_0_10K_GND        								   	    ((uint16_t) 0x0002)
    #define VOUT_PDN_0_100K_GND         									      ((uint16_t) 0x0004)
    #define VOUT_PDN_0_HZ_GND        								     	    ((uint16_t) 0x0006)
    
    #define IOUT_PDN_0_PWR_ON                                 ((uint16_t) 0x0000)
    #define IOUT_PDN_0_PWR_OFF                                ((uint16_t) 0x0001)
    
    
    
    
    
    /* Register 0x20 (COMMON-TRIGGER) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                DEV-UNLOCK                                 |                                   RESET                                   |       LDAC       |        CLR       |         X        |      FAULT-DUMP  |      PROTECT     |   READ-ONE-TRIG  |     NVM-PROG     |    NVM-RELOAD    |          
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /*  COMMON-TRIGGER register address */
    #define  COMMON_TRIGGER_ADDRESS							   			((uint8_t) 0x20)
    
    
    /*  COMMON-TRIGGER default (reset) value */
    #define COMMON_TRIGGER_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /*   COMMON-TRIGGER register field masks */
    #define DEV_UNLOCK          									       ((uint16_t) 0x5000)
    
    #define POR_RESET         								   	      ((uint16_t) 0x0A00)
    
    #define LDAC_OFF         		      						   	      ((uint16_t) 0x0000)
    #define LDAC_ON         		      						   	      ((uint16_t) 0x0080)
    
    #define CLR_NO_EFFECT        		      						   	      ((uint16_t) 0x0000)
    #define CLR_CLR_SEL_X                                        ((uint16_t) 0x0040)
    
    #define FAULT_DUMP_NOTRIG        		      						   	      ((uint16_t) 0x0000)
    #define FAULT_DUMP_TRIG                                        ((uint16_t) 0x0010)
    
    #define NO_PROTECT        		      						   	      ((uint16_t) 0x0000)
    #define PROTECT                                           ((uint16_t) 0x0008)
    
    #define NO_READ_ONE_TRIG        		      						   	      ((uint16_t) 0x0000)
    #define READ_ONE_TRIG                                           ((uint16_t) 0x0004)
    
    #define NO_NVM_PROG        		      						   	      ((uint16_t) 0x0000)
    #define NVM_PROG                                          ((uint16_t) 0x0002)
    
    #define NO_NVM_RELOAD        		      						   	      ((uint16_t) 0x0000)
    #define NVM_RELOAD                                         ((uint16_t) 0x0001)
    
    
    
    /* Register 0x21 (COMMON-DAC-TRIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * | RESET-CMP-FLAG-0 |   TRIG-MAR-LO-0  |   TRIG-MAR-HI-0  |   START-FUNC-0   | RESET-CMP-FLAG-1 |   TRIG-MAR-LO-1  |   TRIG-MAR-HI-1  |   START-FUNC-1   | RESET-CMP-FLAG-2 |   TRIG-MAR-LO-2  |   TRIG-MAR-HI-2  |   START-FUNC-2   | RESET-CMP-FLAG-3 |   TRIG-MAR-LO-3  |   TRIG-MAR-HI-3  |   START-FUNC-3   |                  
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* COMMON-DAC-TRIG register address */
    #define  COMMON_DAC_TRIG_ADDRESS							   			((uint8_t) 0x21)
    
    
    /* COMMON-DAC-TRIG default (reset) value */
    #define COMMON_DAC_TRIG_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* COMMON-DAC-TRIG register field masks */
    #define RESET_CMP_FLAG_0          									  ((uint16_t) 0x0000)
    #define RESET_CMP_FLAG_0_RESET          									 ((uint16_t) 0x8000)
    
    #define TRIG_MAR_LO_0_NO         									  ((uint16_t) 0x0000)
    #define TRIG_MAR_LO_0_TRIG          		  							 ((uint16_t) 0x4000)
    
    #define TRIG_MAR_HI_0_NO          									  ((uint16_t) 0x0000)
    #define TRIG_MAR_HI_0_TRIG          									 ((uint16_t) 0x2000)
    
    #define START_FUNC_0_OFF          									  ((uint16_t) 0x0000)
    #define START_FUNC_0_ON         									 ((uint16_t) 0x1000)
    
    
    #define RESET_CMP_FLAG_1          									  ((uint16_t) 0x0000)
    #define RESET_CMP_FLAG_1_RESET          									 ((uint16_t) 0x0800)
    
    #define TRIG_MAR_LO_1_NO         									  ((uint16_t) 0x0000)
    #define TRIG_MAR_LO_1_TRIG          		  							 ((uint16_t) 0x0400)
    
    #define TRIG_MAR_HI_1_NO          									  ((uint16_t) 0x0000)
    #define TRIG_MAR_HI_1_TRIG          									 ((uint16_t) 0x0200)
    
    #define START_FUNC_1_OFF          									  ((uint16_t) 0x0000)
    #define START_FUNC_1_ON         									 ((uint16_t) 0x0100)
    
    #define RESET_CMP_FLAG_2          									  ((uint16_t) 0x0000)
    #define RESET_CMP_FLAG_2_RESET          									 ((uint16_t) 0x0080)
    
    #define TRIG_MAR_LO_2_NO         									  ((uint16_t) 0x0000)
    #define TRIG_MAR_LO_2_TRIG          		  							 ((uint16_t) 0x0040)
    
    #define TRIG_MAR_HI_2_NO          									  ((uint16_t) 0x0000)
    #define TRIG_MAR_HI_2_TRIG          									 ((uint16_t) 0x0020)
    
    #define START_FUNC_2_OFF          									  ((uint16_t) 0x0000)
    #define START_FUNC_2_ON         									 ((uint16_t) 0x0010)
    
    #define RESET_CMP_FLAG_3          									  ((uint16_t) 0x0000)
    #define RESET_CMP_FLAG_3_RESET          									 ((uint16_t) 0x0008)
    
    #define TRIG_MAR_LO_3_NO         									  ((uint16_t) 0x0000)
    #define TRIG_MAR_LO_3_TRIG          		  							 ((uint16_t) 0x0004)
    
    #define TRIG_MAR_HI_3_NO          									  ((uint16_t) 0x0000)
    #define TRIG_MAR_HI_3_TRIG          									 ((uint16_t) 0x0002)
    
    #define START_FUNC_3_OFF          									  ((uint16_t) 0x0000)
    #define START_FUNC_3_ON         									 ((uint16_t) 0x0001)
    
    
    
    
    /* Register 0x22 (GENERAL-STATUS) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * | NVM-CRC-FAIL-INT |NVM-CRC-FAIL-USER |        X         |     DAC-3-BUSY   |    DAC-2-BUSY    |    DAC-1-BUSY    |    DAC-0-BUSY    |         X        |                                                             DEVICE-ID                                                              |     VERSION-ID   |                  
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* GENERAL-STATUS register address */
    #define  GENERAL_STATUS_ADDRESS							   			((uint8_t) 0x22)
    
    
    /* GENERAL-STATUS default (reset) value */
    #define GENERAL_STATUS_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* GENERAL-STATUS register field masks */
    #define NVM_CRC_FAIL_INT_NOERR          									  ((uint16_t) 0x0000)
    #define NVM_CRC_FAIL_INT_OTPERR          									 ((uint16_t) 0x8000)
    
    #define NVM_CRC_FAIL_USER_NOERR          									  ((uint16_t) 0x0000)
    #define NVM_CRC_FAIL_INT_NVMERR          									 ((uint16_t) 0x4000)
    
    #define DAC_3_IDLE          									  ((uint16_t) 0x0000)
    #define DAC_3_BUSY          									  ((uint16_t) 0x1000)
    #define DAC_2_IDLE          									  ((uint16_t) 0x0000)
    #define DAC_2_BUSY          									  ((uint16_t) 0x0800)
    #define DAC_1_IDLE          									  ((uint16_t) 0x0000)
    #define DAC_1_BUSY          									  ((uint16_t) 0x0400)
    #define DAC_0_IDLE          									  ((uint16_t) 0x0000)
    #define DAC_0_BUSY          									  ((uint16_t) 0x0200)
    
    #define DEVICE_ID          									    ((uint8_t) 0x04)
    #define VERSION_ID          									  ((uint8_t) 0x00)
    
    
    
    /* Register 0x23 (CMP-STATUS) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                              X                                                                     |   PROTECT-FLAG   |     WIN-CMP-3    |      WIN-CMP-2   |     WIN-CMP-1    |     WIN-CMP-0    |     CMP-FLAG-3   |     CMP-FLAG-2   |     CMP-FLAG-1   |     CMP-FLAG-0   |                  
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* CMP-STATUS register address */
    #define  CMP_STATUS_ADDRESS							   			((uint8_t) 0x23)
    
    
    /* CMP-STATUS default (reset) value */
    #define CMP_STATUS_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* CMP-STATUS register field masks */
    #define PROTECT_FLAG          									  ((uint16_t) 0x0000)
    #define PROTECT_FLAG_DONE          								((uint16_t) 0x0100)
    
    #define WIN_CMP_3          									  ((uint16_t) 0x0080)
    #define WIN_CMP_2          								    ((uint16_t) 0x0040)
    #define WIN_CMP_1          									  ((uint16_t) 0x0020)
    #define WIN_CMP_0          							    	((uint16_t) 0x0010)
    
    #define CMP_FLAG_3          									  ((uint16_t) 0x0008)
    #define CMP_FLAG_2          								    ((uint16_t) 0x0004)
    #define CMP_FLAG_1          									  ((uint16_t) 0x0002)
    #define CMP_FLAG_0          							    	((uint16_t) 0x0001)
    
    
    
    /* Register 0x24 (GPIO-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |       GF-EN      |  DEEP-SLEEP-EN   |       GPO-EN     |                                GPO-CONFIG                                 |                                  GPI-CH-SEL                               |                                GPI-CONFIG                                 |       GPI-EN     |                  
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* GPIO-CONFIG register address */
    #define  GPIO_CONFIG_ADDRESS							   			((uint8_t) 0x24)
    
    
    /* GPIO-CONFIG default (reset) value */
    #define GPIO_CONFIG_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* GPIO-CONFIG register field masks */
    #define GF_EN_NOFILTER          						     			  ((uint16_t) 0x0000)
    #define GF_EN_FILTER          					          			((uint16_t) 0x8000)
    
    #define DEEP_SLEEP_DEN          						     			  ((uint16_t) 0x0000)
    #define DEEP_SLEEP_EN          					          			((uint16_t) 0x4000)
    
    #define GPO_DEN                  						     			  ((uint16_t) 0x0000)
    #define GPO_EN          					          	      		((uint16_t) 0x2000)
    
    #define GPO_CONFIG_NVM_BUSY     						     			  ((uint16_t) 0x0200)
    #define GPO_CONFIG_DAC_0_BUSY          					        ((uint16_t) 0x0800)
    #define GPO_CONFIG_DAC_1_BUSY          					        ((uint16_t) 0x0A00)
    #define GPO_CONFIG_DAC_2_BUSY          					        ((uint16_t) 0x0C00)
    #define GPO_CONFIG_DAC_3_BUSY          					        ((uint16_t) 0x0E00)
    #define GPO_CONFIG_WIN_CMP_0          					        ((uint16_t) 0x1000)
    #define GPO_CONFIG_WIN_CMP_1          					       	((uint16_t) 0x1200)
    #define GPO_CONFIG_WIN_CMP_2          					       	((uint16_t) 0x1400)
    #define GPO_CONFIG_WIN_CMP_3          					       	((uint16_t) 0x1600)
    
    
    #define GPI_CH3_SEL_DEN          						     			  ((uint16_t) 0x0000)
    #define GPI_CH3_SEL_EN          						     			  ((uint16_t) 0x0100)
    #define GPI_CH2_SEL_DEN          						     			  ((uint16_t) 0x0000)
    #define GPI_CH2_SEL_EN          						     			  ((uint16_t) 0x0080)
    #define GPI_CH1_SEL_DEN          						     			  ((uint16_t) 0x0000)
    #define GPI_CH1_SEL_EN          						     		    ((uint16_t) 0x0040)
    #define GPI_CH0_SEL_DEN          						     			  ((uint16_t) 0x0000)
    #define GPI_CH0_SEL_EN          						     	      ((uint16_t) 0x0020)
    
    #define GPI_CONFIG          						     			  ((uint16_t) 0x0000)
    //略,用不到
    
    #define GPI_DEN          						     			  ((uint16_t) 0x0000)
    #define GPI_EN          						     			  ((uint16_t) 0x0001)
    
    /* Register 0x25 (DEVICE-MODE-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |               RESERVED              |    DIS-MODE-IN   |                         RESERVED                       |            PROTECT-CONFIG           |                        RESERVED                        |                                             X                                                |                  
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* DEVICE-MODE-CONFIG register address */
    #define  DEVICE_MODE_CONFIG_ADDRESS							   			((uint8_t) 0x25)
    
    
    /* DEVICE-MODE-CONFIG default (reset) value */
    #define DEVICE_MODE_CONFIG_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* DEVICE-MODE-CONFIG register field masks */
    #define DIS_MODE_IN_LOWPER_DEN          						     			  ((uint16_t) 0x0000)
    #define DIS_MODE_IN_LOWPER_EN          					          			((uint16_t) 0x2000)
    
    #define PROTECT_CONFIG_HZ_PWRDOWN          						     			  ((uint16_t) 0x0000)
    #define PROTECT_CONFIG_NVM_HZ_PWRDOWN          					          			((uint16_t) 0x0100)
    #define PROTECT_CONFIG_MARGIN_HI_PWRDOWN          						     			  ((uint16_t) 0x0200)
    #define PROTECT_CONFIG_MARGIN_LOW_PWRDOWN          					          			((uint16_t) 0x0300)
    
    
    
    /* Register 0x26 (INTERFACE-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                            X                           |     TIMEOUT-EN   |                             X                          |      EN-PMBUS    |                                              X                                               |     FSDO-EN      |         X        |      SDO-EN      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* INTERFACE-CONFIG register address */
    #define  INTERFACE_CONFIG_ADDRESS							   			((uint8_t) 0x26)
    
    
    /* INTERFACE-CONFIG default (reset) value */
    #define INTERFACE_CONFIG_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* INTERFACE-CONFIG register field masks */
    #define I2C_TIMEOUT_DEN          						     			  ((uint16_t) 0x0000)
    #define I2C_TIMEOUT_EN          					          		((uint16_t) 0x1000)
    
    #define I2C_PMBUS_DEN          						     			  ((uint16_t) 0x0000)
    #define I2C_PMBUS_EN          					          		((uint16_t) 0x0100)
    
    #define I2C_FSDO_DEN          						     			  ((uint16_t) 0x0000)
    #define I2C_FSDO_EN          					          		((uint16_t) 0x0004)
    
    #define I2C_SDO_DEN          						     			  ((uint16_t) 0x0000)
    #define I2C_SDO_EN          					          		((uint16_t) 0x0001)
    
    
    /* Register 0x2B (SRAM-CONFIG) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                                                         X                                                             |                                                                        SRAM-ADDR                                                                      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* SRAM-CONFIG register address */
    #define  SRAM_CONFIG_ADDRESS							   			((uint8_t) 0x2B)
    
    
    /* SRAM-CONFIG default (reset) value */
    #define SRAM_CONFIG_DEFAULT							    		((uint16_t) 0x0000)
    //略,用不到
    
    
    
    
    /* Register 0x2C (SRAM-DATA) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                                                                                                                      SRAM-DATA                                                                                                                                                |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* SRAM-DATA register address */
    #define  SRAM_DATA_ADDRESS							   			((uint8_t) 0x2C)
    
    
    /* SRAM-DATA default (reset) value */
    #define SRAM_DATA_DEFAULT							    		((uint16_t) 0x0000)
    //略,用不到
    
    
    
    /* Register 0x40/41/42/43 (DAC-X-DATA-8BIT) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                            DAC-X-DATA-8BIT[7:0]                                                                       |                                                                            X                                                                          |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* DAC-X-DATA-8BIT register address */
    #define  DAC_0_DATA_8BIT_ADDRESS							   			((uint8_t) 0x40)
    #define  DAC_1_DATA_8BIT_ADDRESS							   			((uint8_t) 0x41)
    #define  DAC_2_DATA_8BIT_ADDRESS							   			((uint8_t) 0x42)
    #define  DAC_3_DATA_8BIT_ADDRESS							   			((uint8_t) 0x43)
    
    /* DAC-X-DATA-8BIT default (reset) value */
    #define DAC_X_DATA_8BIT_DEFAULT							    		((uint16_t) 0x0000)
    
    
    /* Register 0x50 (BRDCAST-DATA) definition
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |      Bit 15      |      Bit 14      |      Bit 13      |      Bit 12      |      Bit 11      |      Bit 10      |       Bit 9      |       Bit 8      |       Bit 7      |       Bit 6      |       Bit 5      |       Bit 4      |       Bit 3      |       Bit 2      |       Bit 1      |       Bit 0      |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     * |                                                                                                      BRDCAST-DATA[11:0]                                                                                                           |                                X                                          |
     * |---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
     */
    
    /* BRDCAST-DATA register address */
    #define  BRDCAST_DATA_ADDRESS							   			    ((uint8_t) 0x50)
    
    
    /* BRDCAST-DATA default (reset) value */
    #define BRDCAST_DATA_DEFAULT							    		((uint16_t) 0x0000)
    
    
    #endif /* DAC60034_H_ */
    

  • 非常感谢您的分享!

  • 还有个小问题,对DAC参数中的MARGIN和SLEW RATE的理解上不是很到位,虽然目前没用到,想问下TI有没有这方面讲解的技术手册共享,谢谢

  • 具体指哪里的MARGIN和SLEW RATE,可以给出datasheet 截图吗