我会使用WORD-WIDE FORMAT格式,FPGA输出数字信号给DAC3484,但是如何区分A B C D4个信道啊,时钟DDR的双沿只能区分两个,4个还需要一个指示信号啊?datasheet看不出来,FRAMEP/N SYNCP/N讲的不是很明白好像说是同步和奇偶校验用的。
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看看手册图52. 是FPGA按照ABCD的顺序往DAC的接口里写数据来保证的。
从Frame或者SYnc有效开始