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16-bit, 24 MSPS analog-to-digital converter (ADC) 4-channel operation up to 24 MHz (6 MHz/channel) 3-channel operation up to 24 MHz (8 MHz/channel) Selectable input range: 3 V or 1.5 V peak-to-peak Input clamp circuitry Correlated double sampling 1×~6× programmable gain ±300 mV programmable offset Internal voltage reference Multiplexed byte-wide output Optional single-byte output mode 3-wire serial digital interface 3 V/5 V digital I/O compatibility Power dissipation: 490 mW at 24 MHz operation Reduced power mode and sleep mode available 28-lead SSOP package
这些性能要求不低, 不过 TI 在ADC 方面器件性能也很强, 性能完全等价的器件不好找, 从精度采样率和通道数, 查到了一个 100Msps 的ADS5263
