TLIN1028-Q1: LIN SBC can`t wake up from sleep mode by power on

When you pull EN low to enter sleep mode and then remove VSUP/VCC, the device do not actively pull its internal 3.3 V rail (and its decoupling network) down to 0 V - those caps simply sit there, holding the rail up until they bleed off through leakage. In other words, sleep mode do not equal a built-in discharge circuitry.

I.e, the external + internal capacitance holds the rail up with at least a 100 nF decoupling cap on VSUP and the recommended (or similar) on the LDO output (VCC3V3).  On top of that, the TLIN1028A-Q1 has on-chip storage capacitances on its LDO output and across its internal regulators. When you pull VSUP to 0 V, none of that capacitance is actively discharged, so VCC3V3 stays above the UVLO threshold (and EN is still low, keeping the part in sleep) until all that charge leaks away, which can easily take minutes if your bulk caps are large.

Also, un-power mode only occurs once VCC3V3 drops below UV thresholds. See section 7.6 of the data sheet. The device unpowered, high-impedance behavior only kicks in once both VSUP < UVL and the internal VCC3V3 node falls below its own UVLO point. Until then, the internal LDO is still in regulation, so RST stays low and the chip acts as though it is sleeping, not unpowered.

Only once all the bulk capacitance has bled off through tiny leakage paths (similar to your 3 mins observation) in your decoupling network, board parasitics, and the device itself will VCC3V3 finally dip below its UVLO threshold. At that instant the internal LDO turns off, RST releases high, and on your next VSUP rise you see the full power-on ramp and reset sequence exactly per spec.

If you want the device to enter its unpowered, high-impedance mode immediately when VSUP is removed, you need to actively discharge its rail capacitance.

Add a bleed resistor (e.g. 100 k to 1 Mohms) from VCC3V3 to ground. That resistor will drain the LDO output cap quickly enough (time constant RC) so that VCC3V3 falls below UVLO in milliseconds, not minutes.

Or switch EN and VSUP together, so that as soon as you pull VSUP low you also connect a discharge path on VCC3V3 (via your MCU or an external transistor).

You can also reduce bulk capacitance if your application allows, use only the minimum decoupling required next to the pin, and locate any large bulk caps off-board or behind a bleed resistor, thanks.