当使用器件时,配置12.5G的二分频去重定时6.25Gbps的数据时,将管脚ADDR0/LOCK作为CDR状态检测的管脚,按照手册说明,当CDR锁定时该管脚将输出高电平。但是在使用时,发现该管脚始终为低电平,只有当把器件连接到Sigcon GUI并且打开state monitor连续更新状态后,CDR才显示锁定并将该管脚输出为高电平。并且当输入信号断掉再重新给retimer 之后,CDR无法锁定,同样是必须打开monitor持续update后才能锁定。想请问这个问题如何解决?
当使用器件时,配置12.5G的二分频去重定时6.25Gbps的数据时,将管脚ADDR0/LOCK作为CDR状态检测的管脚,按照手册说明,当CDR锁定时该管脚将输出高电平。但是在使用时,发现该管脚始终为低电平,只有当把器件连接到Sigcon GUI并且打开state monitor连续更新状态后,CDR才显示锁定并将该管脚输出为高电平。并且当输入信号断掉再重新给retimer 之后,CDR无法锁定,同样是必须打开monitor持续update后才能锁定。想请问这个问题如何解决?
这是直接导出的DS125内部寄存器的值
CDR.cfg:
0x0 Shared Registers_0x00 00
0x1 Shared Registers_0x01 61
0x3 Shared Registers_0x03 00
0x4 Shared Registers_0x04 01
0x5 Shared Registers_0x05 10
0x6 Shared Registers_0x06 00
0x7 Shared Registers_0x07 04
0xFF Global Registers_0xFF 01
0x0 CH A_0x00 00
0x1 CH A_0x01 00
0x2 CH A_0x02 00
0x3 CH A_0x03 00
0x8 CH A_0x08 00
0x9 CH A_0x09 00
0xA CH A_0x0A 00
0xB CH A_0x0B 0F
0xC CH A_0x0C 08
0xD CH A_0x0D 00
0xE CH A_0x0E 93
0xF CH A_0x0F 69
0x10 CH A_0x10 3A
0x11 CH A_0x11 20
0x12 CH A_0x12 A0
0x13 CH A_0x13 90
0x14 CH A_0x14 00
0x15 CH A_0x15 10
0x16 CH A_0x16 7A
0x17 CH A_0x17 25
0x18 CH A_0x18 40
0x19 CH A_0x19 37
0x1A CH A_0x1A 00
0x1B CH A_0x1B 03
0x1C CH A_0x1C 24
0x1D CH A_0x1D 00
0x1E CH A_0x1E 01
0x1F CH A_0x1F 55
0x20 CH A_0x20 00
0x21 CH A_0x21 00
0x22 CH A_0x22 00
0x23 CH A_0x23 C0
0x24 CH A_0x24 40
0x25 CH A_0x25 00
0x26 CH A_0x26 00
0x27 CH A_0x27 00
0x28 CH A_0x28 00
0x29 CH A_0x29 00
0x2A CH A_0x2A 30
0x2B CH A_0x2B 00
0x2C CH A_0x2C 72
0x2D CH A_0x2D 87
0x2E CH A_0x2E 00
0x2F CH A_0x2F 67
0x30 CH A_0x30 00
0x31 CH A_0x31 00
0x32 CH A_0x32 11
0x33 CH A_0x33 88
0x34 CH A_0x34 BF
0x35 CH A_0x35 1F
0x36 CH A_0x36 31
0x37 CH A_0x37 00
0x38 CH A_0x38 00
0x39 CH A_0x39 00
0x3A CH A_0x3A 00
0x3B CH A_0x3B 33
0x3C CH A_0x3C F9
0x3D CH A_0x3D 00
0x3E CH A_0x3E 80
0x3F CH A_0x3F 00
0x40 CH A_0x40 00
0x41 CH A_0x41 40
0x42 CH A_0x42 80
0x43 CH A_0x43 50
0x44 CH A_0x44 C0
0x45 CH A_0x45 90
0x46 CH A_0x46 54
0x47 CH A_0x47 A0
0x48 CH A_0x48 B0
0x49 CH A_0x49 95
0x4A CH A_0x4A 69
0x4B CH A_0x4B D5
0x4C CH A_0x4C 99
0x4D CH A_0x4D A5
0x4E CH A_0x4E E6
0x4F CH A_0x4F F9
0x50 CH A_0x50 00
0x51 CH A_0x51 00
0x52 CH A_0x52 00
0x53 CH A_0x53 00
0x54 CH A_0x54 00
0x55 CH A_0x55 00
0x56 CH A_0x56 00
0x60 CH A_0x60 80
0x61 CH A_0x61 BE
0x62 CH A_0x62 90
0x63 CH A_0x63 B3
0x64 CH A_0x64 FD
0x65 CH A_0x65 00
0x66 CH A_0x66 00
0x67 CH A_0x67 00
0x68 CH A_0x68 00
0x69 CH A_0x69 0A
0x6A CH A_0x6A 44
0x6B CH A_0x6B 40
0x6C CH A_0x6C 00
0x6D CH A_0x6D 00
0x6E CH A_0x6E 00
0x6F CH A_0x6F 00
0x70 CH A_0x70 03
0x71 CH A_0x71 20
0x72 CH A_0x72 00
0x73 CH A_0x73 00
0x74 CH A_0x74 00
0x75 CH A_0x75 00
0x0 CH B_0x00 00
0x1 CH B_0x01 00
0x2 CH B_0x02 9C
0x3 CH B_0x03 00
0x8 CH B_0x08 00
0x9 CH B_0x09 00
0xA CH B_0x0A 00
0xB CH B_0x0B 0F
0xC CH B_0x0C 08
0xD CH B_0x0D 00
0xE CH B_0x0E 93
0xF CH B_0x0F 69
0x10 CH B_0x10 3A
0x11 CH B_0x11 20
0x12 CH B_0x12 A0
0x13 CH B_0x13 90
0x14 CH B_0x14 00
0x15 CH B_0x15 10
0x16 CH B_0x16 7A
0x17 CH B_0x17 25
0x18 CH B_0x18 40
0x19 CH B_0x19 37
0x1A CH B_0x1A 00
0x1B CH B_0x1B 03
0x1C CH B_0x1C 24
0x1D CH B_0x1D 00
0x1E CH B_0x1E 01
0x1F CH B_0x1F 55
0x20 CH B_0x20 00
0x21 CH B_0x21 00
0x22 CH B_0x22 00
0x23 CH B_0x23 C0
0x24 CH B_0x24 00
0x25 CH B_0x25 00
0x26 CH B_0x26 00
0x27 CH B_0x27 2D
0x28 CH B_0x28 72
0x29 CH B_0x29 20
0x2A CH B_0x2A 30
0x2B CH B_0x2B 00
0x2C CH B_0x2C 72
0x2D CH B_0x2D 87
0x2E CH B_0x2E 00
0x2F CH B_0x2F 67
0x30 CH B_0x30 00
0x31 CH B_0x31 00
0x32 CH B_0x32 11
0x33 CH B_0x33 88
0x34 CH B_0x34 BF
0x35 CH B_0x35 1F
0x36 CH B_0x36 31
0x37 CH B_0x37 01
0x38 CH B_0x38 10
0x39 CH B_0x39 00
0x3A CH B_0x3A 00
0x3B CH B_0x3B 33
0x3C CH B_0x3C 8E
0x3D CH B_0x3D 00
0x3E CH B_0x3E 80
0x3F CH B_0x3F 00
0x40 CH B_0x40 00
0x41 CH B_0x41 40
0x42 CH B_0x42 80
0x43 CH B_0x43 50
0x44 CH B_0x44 C0
0x45 CH B_0x45 90
0x46 CH B_0x46 54
0x47 CH B_0x47 A0
0x48 CH B_0x48 B0
0x49 CH B_0x49 95
0x4A CH B_0x4A 69
0x4B CH B_0x4B D5
0x4C CH B_0x4C 99
0x4D CH B_0x4D A5
0x4E CH B_0x4E E6
0x4F CH B_0x4F F9
0x50 CH B_0x50 00
0x51 CH B_0x51 00
0x52 CH B_0x52 40
0x53 CH B_0x53 00
0x54 CH B_0x54 80
0x55 CH B_0x55 00
0x56 CH B_0x56 00
0x60 CH B_0x60 80
0x61 CH B_0x61 BE
0x62 CH B_0x62 90
0x63 CH B_0x63 B3
0x64 CH B_0x64 FD
0x65 CH B_0x65 00
0x66 CH B_0x66 00
0x67 CH B_0x67 00
0x68 CH B_0x68 00
0x69 CH B_0x69 0A
0x6A CH B_0x6A 44
0x6B CH B_0x6B 40
0x6C CH B_0x6C 00
0x6D CH B_0x6D 00
0x6E CH B_0x6E 00
0x6F CH B_0x6F 00
0x70 CH B_0x70 03
0x71 CH B_0x71 20
0x72 CH B_0x72 00
0x73 CH B_0x73 00
0x74 CH B_0x74 00
0x75 CH B_0x75 00
NO CDR:
0x0 Shared Registers_0x00 00
0x1 Shared Registers_0x01 61
0x3 Shared Registers_0x03 00
0x4 Shared Registers_0x04 01
0x5 Shared Registers_0x05 10
0x6 Shared Registers_0x06 00
0x7 Shared Registers_0x07 04
0xFF Global Registers_0xFF 01
0x0 CH A_0x00 00
0x1 CH A_0x01 00
0x2 CH A_0x02 00
0x3 CH A_0x03 00
0x8 CH A_0x08 00
0x9 CH A_0x09 00
0xA CH A_0x0A 00
0xB CH A_0x0B 0F
0xC CH A_0x0C 08
0xD CH A_0x0D 00
0xE CH A_0x0E 93
0xF CH A_0x0F 69
0x10 CH A_0x10 3A
0x11 CH A_0x11 20
0x12 CH A_0x12 A0
0x13 CH A_0x13 90
0x14 CH A_0x14 00
0x15 CH A_0x15 10
0x16 CH A_0x16 7A
0x17 CH A_0x17 25
0x18 CH A_0x18 40
0x19 CH A_0x19 37
0x1A CH A_0x1A 00
0x1B CH A_0x1B 03
0x1C CH A_0x1C 24
0x1D CH A_0x1D 00
0x1E CH A_0x1E 01
0x1F CH A_0x1F 55
0x20 CH A_0x20 00
0x21 CH A_0x21 00
0x22 CH A_0x22 00
0x23 CH A_0x23 C0
0x24 CH A_0x24 40
0x25 CH A_0x25 00
0x26 CH A_0x26 00
0x27 CH A_0x27 00
0x28 CH A_0x28 00
0x29 CH A_0x29 00
0x2A CH A_0x2A 30
0x2B CH A_0x2B 00
0x2C CH A_0x2C 72
0x2D CH A_0x2D 87
0x2E CH A_0x2E 00
0x2F CH A_0x2F 67
0x30 CH A_0x30 00
0x31 CH A_0x31 00
0x32 CH A_0x32 11
0x33 CH A_0x33 88
0x34 CH A_0x34 BF
0x35 CH A_0x35 1F
0x36 CH A_0x36 31
0x37 CH A_0x37 00
0x38 CH A_0x38 00
0x39 CH A_0x39 00
0x3A CH A_0x3A 00
0x3B CH A_0x3B 33
0x3C CH A_0x3C F9
0x3D CH A_0x3D 00
0x3E CH A_0x3E 80
0x3F CH A_0x3F 00
0x40 CH A_0x40 00
0x41 CH A_0x41 40
0x42 CH A_0x42 80
0x43 CH A_0x43 50
0x44 CH A_0x44 C0
0x45 CH A_0x45 90
0x46 CH A_0x46 54
0x47 CH A_0x47 A0
0x48 CH A_0x48 B0
0x49 CH A_0x49 95
0x4A CH A_0x4A 69
0x4B CH A_0x4B D5
0x4C CH A_0x4C 99
0x4D CH A_0x4D A5
0x4E CH A_0x4E E6
0x4F CH A_0x4F F9
0x50 CH A_0x50 00
0x51 CH A_0x51 00
0x52 CH A_0x52 00
0x53 CH A_0x53 00
0x54 CH A_0x54 00
0x55 CH A_0x55 00
0x56 CH A_0x56 00
0x60 CH A_0x60 80
0x61 CH A_0x61 BE
0x62 CH A_0x62 90
0x63 CH A_0x63 B3
0x64 CH A_0x64 FD
0x65 CH A_0x65 00
0x66 CH A_0x66 00
0x67 CH A_0x67 00
0x68 CH A_0x68 00
0x69 CH A_0x69 0A
0x6A CH A_0x6A 44
0x6B CH A_0x6B 40
0x6C CH A_0x6C 00
0x6D CH A_0x6D 00
0x6E CH A_0x6E 00
0x6F CH A_0x6F 00
0x70 CH A_0x70 03
0x71 CH A_0x71 20
0x72 CH A_0x72 00
0x73 CH A_0x73 00
0x74 CH A_0x74 00
0x75 CH A_0x75 00
0x0 CH B_0x00 00
0x1 CH B_0x01 00
0x2 CH B_0x02 84
0x3 CH B_0x03 00
0x8 CH B_0x08 00
0x9 CH B_0x09 00
0xA CH B_0x0A 00
0xB CH B_0x0B 0F
0xC CH B_0x0C 08
0xD CH B_0x0D 00
0xE CH B_0x0E 93
0xF CH B_0x0F 69
0x10 CH B_0x10 3A
0x11 CH B_0x11 20
0x12 CH B_0x12 A0
0x13 CH B_0x13 90
0x14 CH B_0x14 00
0x15 CH B_0x15 10
0x16 CH B_0x16 7A
0x17 CH B_0x17 25
0x18 CH B_0x18 40
0x19 CH B_0x19 37
0x1A CH B_0x1A 00
0x1B CH B_0x1B 03
0x1C CH B_0x1C 24
0x1D CH B_0x1D 00
0x1E CH B_0x1E 01
0x1F CH B_0x1F 55
0x20 CH B_0x20 00
0x21 CH B_0x21 00
0x22 CH B_0x22 00
0x23 CH B_0x23 C0
0x24 CH B_0x24 40
0x25 CH B_0x25 00
0x26 CH B_0x26 00
0x27 CH B_0x27 00
0x28 CH B_0x28 00
0x29 CH B_0x29 00
0x2A CH B_0x2A 30
0x2B CH B_0x2B 00
0x2C CH B_0x2C 72
0x2D CH B_0x2D 87
0x2E CH B_0x2E 00
0x2F CH B_0x2F 67
0x30 CH B_0x30 00
0x31 CH B_0x31 00
0x32 CH B_0x32 11
0x33 CH B_0x33 88
0x34 CH B_0x34 BF
0x35 CH B_0x35 1F
0x36 CH B_0x36 31
0x37 CH B_0x37 00
0x38 CH B_0x38 10
0x39 CH B_0x39 00
0x3A CH B_0x3A 00
0x3B CH B_0x3B 33
0x3C CH B_0x3C 8E
0x3D CH B_0x3D 00
0x3E CH B_0x3E 80
0x3F CH B_0x3F 00
0x40 CH B_0x40 00
0x41 CH B_0x41 40
0x42 CH B_0x42 80
0x43 CH B_0x43 50
0x44 CH B_0x44 C0
0x45 CH B_0x45 90
0x46 CH B_0x46 54
0x47 CH B_0x47 A0
0x48 CH B_0x48 B0
0x49 CH B_0x49 95
0x4A CH B_0x4A 69
0x4B CH B_0x4B D5
0x4C CH B_0x4C 99
0x4D CH B_0x4D A5
0x4E CH B_0x4E E6
0x4F CH B_0x4F F9
0x50 CH B_0x50 00
0x51 CH B_0x51 00
0x52 CH B_0x52 00
0x53 CH B_0x53 00
0x54 CH B_0x54 80
0x55 CH B_0x55 00
0x56 CH B_0x56 00
0x60 CH B_0x60 80
0x61 CH B_0x61 BE
0x62 CH B_0x62 90
0x63 CH B_0x63 B3
0x64 CH B_0x64 FD
0x65 CH B_0x65 00
0x66 CH B_0x66 00
0x67 CH B_0x67 00
0x68 CH B_0x68 00
0x69 CH B_0x69 0A
0x6A CH B_0x6A 44
0x6B CH B_0x6B 40
0x6C CH B_0x6C 00
0x6D CH B_0x6D 00
0x6E CH B_0x6E 00
0x6F CH B_0x6F 00
0x70 CH B_0x70 03
0x71 CH B_0x71 20
0x72 CH B_0x72 00
0x73 CH B_0x73 00
0x74 CH B_0x74 00
0x75 CH B_0x75 00
这是导出EEPROM的HEX文件的值:
CDR:
:2000000050001000330000000000000000000000000000000000000000000000000000004D
:200020000000000000000000000000000000000000000000000003C93693A218100041E838
:20004000966E19200A000066007287198008C43F1F3200010020402860482A50584AB4EA1A
:20006000CCD2F37C800000405F4859FEA9000000000000000000000000000000000000000C
NO CDR:
:2000000050001000330000000000000000000000000000000000000000000000000000004D
:200020000000000000000000000000000000000000000000000003C93693A218100041E838
:20004000966E19200A000066007287198008C43F1F3200010020402860482A50584AB4EA1A
:20006000CCD2F37C800000405F4859FEA9000000000000000000000000000000000000000C
对于内部寄存器的值,我们在设备使用时使用的时CHB,所以不用看CHA的数值
你好,
根据寄存器转储,它看起来是相同的设置。
你能重置CDR吗?如果输入信号不稳定,CDR可能无法锁定,因此可能必须进行CDR重置以重新启动CDR。
您能否验证您的初始输入信号是否是CDR可以锁定的良好信号?此外,当您切换到监视器界面时,是否会在不使用sigcon GUI的情况下在监视器界面上发生CDR锁定?
你好,
这很有趣。您正在为重定时器使用正确的信号。
众所周知,该软件存在一些错误,因此这可能是其中之一。
然而,问题是客户在正常使用过程中没有看到CDR状态检测引脚不高,对吗?
根据寄存器转储,我可以看到CDR检测到信号输入(0x54[7]=1),因此看起来CDR是否可以锁定到信号上是一个问题。
在sigcon GUI中,客户是选择重定时数据作为输出还是原始数据?
此外,ADDR0/LOCK引脚是拉到GND还是拉到VDD?这可以改变LOCK引脚显示锁的方式。