Hi TI Team
As shown in the picture. When Ser and Des are locked, GPIO8 will be pulled high. The process from low to high in the red is the process of our SW configuration, but the red part in front is the state where DS90UB948 GPIO8 is pulled high by itself. How can I design it to pull the red box stage low? I have added a pull-down resistor in the schematic, but this problem still cannot be avoided.
I have also shown the SW configuration, please help review it, and please notify me in time if there are any SW configuration issues.