We read all the registers of the PHY chip and all the values are 0xffff.
We looked at this link, but it doesn't work.
We have confirmed that a 50 MHz clock is coming into XI. （ Has power, has reset ）
We read all the registers of the PHY chip and all the values are 0xffff.
We looked at this link, but it doesn't work.
We have confirmed that a 50 MHz clock is coming into XI. （ Has power, has reset ）