Part Number: DS90UB929-Q1
Hi, TI teams:
We use the 929 and 928 as the SerDes chips. On the serializer (Ser) side, a microcontroller is used to configure and operate the 929, while Type-C powers the serializer side independently, and HDMI transmits the video. On the deserializer (Des) side, an FPGA receives the video signal from the 928 and is powered separately with 12V.
We found that as the operating time of the serializer board increases, the probability of failing to transmit video normally also increases.
This is my mcu's state machine:
/** * 0 - Power down all supplies, pull PDB low, wait 5 ms, then bring up 1.8 V, wait 5 ms, * bring up 1.1 V, wait 5 ms, release PDB (pull high), wait 5 ms (I2C ready), then jump to 1. * 1 - Perform FPD-Link Init A, mode select, EDID configuration, remote I2C setup, then jump to 2. * 2 - Monitor interrupt pin level; when an interrupt occurs, go to 3. * 3 - Identify interrupt source; if a downstream interrupt is detected , go to 4. * 4 - Wait for HDMI cable insertion, then go to 5. * 5 - Check whether the HDMI TMDS frequency is stable; once stable, go to 6. * 6 - Perform Init B (HDMI PLL and FPD PLL resets). * 7 - Monitor for HDMI cable removal; when removed, go back to 4. */
With increasing usage, the state machine gets stuck at step 5, unable to detect bit 0 of register 0x5A. At this point, the value read from 0x5A stays constant at 0x66, and this phenomenon is becoming more and more frequent. And can't receive the video sig.
Under normal conditions, the register would read 0x91, indicating that the HDMI clock is stable, and the state machine would then proceed to the next step.
Attached are my schematic design and microcontroller program. This problem is very import for us, How should I resolve this? SCH.pdf main.c 929drv.c
Thanks!
