Part Number: DS90UB983-Q1
我使用的是983 CS2.0串行器，
配置PATGEN的设置如下：
int serAddr = 0x0C;
WriteI2C2(serAddr, 0x40, 0x30);
WriteI2C2(serAddr, 0x41, 0x29);
WriteI2C2(serAddr, 0x42, 0x0C); // 设置PATGEN颜色深度为24bpp用于VP0
WriteI2C2(serAddr, 0x41, 0x28);
WriteI2C2(serAddr, 0x42, 0x95); // 启用VP0上的PATGEN - 注释掉此行以禁用PATGEN并启用端到端视频
WriteI2C2(serAddr, 0x43, 0x00); //#Set number of VPs used = 1
WriteI2C2(serAddr, 0x44, 0x01); //#disable video processors
配置VP0屏参如下：
WriteI2C(serAddr, 0x40, 0x32);
WriteI2C(serAddr, 0x41, 0x01);
WriteI2C(serAddr, 0x42, 0xa8); // 设置VP_SRC_SELECT为Stream 0以使用SST模式
WriteI2C(serAddr, 0x41, 0x02);
WriteI2C(serAddr, 0x42, 0x80); // VID H Active
WriteI2C(serAddr, 0x42, 0x07); // VID H Active
WriteI2C(serAddr, 0x41, 0x10);
WriteI2C(serAddr, 0x42, 0x80); // Horizontal Active
WriteI2C(serAddr, 0x42, 0x07); // Horizontal Active
WriteI2C(serAddr, 0x42, 0x20); // Horizontal Back Porch
WriteI2C(serAddr, 0x42, 0x00); // Horizontal Back Porch
WriteI2C(serAddr, 0x42, 0x20); // Horizontal Sync
WriteI2C(serAddr, 0x42, 0x00); // Horizontal Sync
WriteI2C(serAddr, 0x42, 0x00); // Horizontal Total
WriteI2C(serAddr, 0x42, 0x08); // Horizontal Total
WriteI2C(serAddr, 0x42, 0xd0); // Vertical Active
WriteI2C(serAddr, 0x42, 0x02); // Vertical Active
WriteI2C(serAddr, 0x42, 0x08); // Vertical Back Porch
WriteI2C(serAddr, 0x42, 0x00); // Vertical Back Porch
WriteI2C(serAddr, 0x42, 0x08); // Vertical Sync
WriteI2C(serAddr, 0x42, 0x00); // Vertical Sync
WriteI2C(serAddr, 0x42, 0x2d); // Vertical Front Porch
WriteI2C(serAddr, 0x42, 0x00); // Vertical Front Porch
WriteI2C(serAddr, 0x41, 0x27);
WriteI2C(serAddr, 0x42, 0x00); // HSYNC Polarity = +, VSYNC Polarity = +
问题是之前使用CS1.0的时候，配置PATGEN的WriteI2C2(serAddr, 0x42, 0x0C); 之前写的是WriteI2C2(serAddr, 0x42, 0x08);也查看寄存器手册FPD4_PGCFG_VP0 Register (Address = 0x29) ，差别是第三个bit，Timing Select Control: 1: The Pattern Generator creates its own video timing as configured in the Pattern Generator Total Frame Size, Active Frame Size, Horizontal Sync Width, Vertical Sync Width, Horizontal Back Porch, Vertical Back Porch, and Sync Configuration registers. 0: the Pattern Generator uses external video timing from the pixel clock, Data Enable, Horizontal Sync, and Vertical Sync signals. ，
所以
所以
第一个问题：1.0和2.0中改动了什么，必须得用2.0得设置29寄存器0C才可以亮屏，
第二个问题：外部的Timing和内部的Timing设置有什么区别？
点三个问题：为什么2.0中还需要配置2b寄存器才可以，不配的话屏幕的状态看着不正常，
WriteI2C(serAddr,0x41,0x2a); //Set patgen address
WriteI2C(serAddr,0x42,0x86); //Set patgen address auto increment
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0); //Set patgen THW 2048
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x8); //Set patgen THW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0D); //Set patgen TVW 781
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x03); //Set patgen TVW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x80); //Set patgen AHW 1920
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x7); //Set patgen AHW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0xd0); //Set patgen AVW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x2); //Set patgen AVW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x20); //Set patgen HSW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0); //Set patgen HSW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x8); //Set patgen VSW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0); //Set patgen VSW
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x20); //Set patgen HBP
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0); //Set patgen HBP
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x8); //Set patgen VBP
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0); //Set patgen VBP
WriteI2C(serAddr,0x41,0x2a);
WriteI2C(serAddr,0x42,0x96);
WriteI2C(serAddr,0x41,0x2b);
WriteI2C(serAddr,0x42,0x0); //HSYNC Polarity = +, VSYNC Polarity = +
