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LMK04828 使用单PLL 2，PLL1被PD了，设置成0-delay mode，用clock Design tool 调整了环路，但是还不能lock，是不是0-delay必须用双PLL？，0-delay模式需要注意什么？
单环肯定是可以做0 delay的.参加手册2.1.1.4
When a 0-delay mode is used, a clock output will be passed through the feedback mux to the PLL1 NDivider for synchronization and 0-delay.
谢谢你的回答.
把FB_MUX改成了SYSREF lock的小灯开始闪烁，还不能完全LOCK，参加手册2.1.1.4是什么？能给发个链接么？
http://www.ti.com/product/LMK04808?keyMatch=lmk04808&tisearch=Search-EN-Everything
datasheet
手册是LMK0480x的，LMK04828也适用？
