This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Is it possible to use one of clkin0 / 1/2 as a reference clock input for single-phase-locked loop mode?
THX
可以，看下datasheet Figure10 的内部架构，可以看到内部集成MUX, 即使CLKIN0，1，2都有输入，也需要通过PIN CLKin_SEL1和CLKin_SEL1引脚来配置这三个通道哪个是active的。
