LMH0341输出5对lvds数据和一对lvds时钟,现在想把数据在FPGA内部转化为24bitRGB,目前不知道LVDS输出数据的排列方式,请问有人知道吗?
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您好, 输出RX0~RX4 就是指的5对data, RXCLK+- 即为LVDS clock。