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您好，我已经收到美国工程师的回复，他希望您这边能够提供完整的寄存器顺序和寄存器的值，以便帮助分析，另外，他也给了一些建议。我将他的回复贴在这里，您看下：
The Linux driver has been included into the Kernel and the Linux community is responsible for driver support. This is a device support forum and I can help you with device specific issues, but I will not be of much help if the issue is with the linux driver.
I previously asked you to send me the complete register sequence and values they are writing/reading from the device in their configuration sequence. Can you please provide that so that I can check it for errors? Without this information, I am unable to answer your question.
I also previously mentioned the required registers and sequence that needed to be followed to change the frequency.
The INIT and CCE bits of the CCCR register must be set to '1' prior to changing the NBTP and DBTP registers that configure the Nominal and Data phase bit timing. If the CCCR register eqals 0x0303, then you should be able to set the NBTP and DBTP registers with the new values. Then you will need to set the CCE and INIT bits in the CCCR register back to '0' before the configuration is complete.
Can you tell me the value of the CCCR (0x1018), NBTP (0x101C), DBTP (0x100C) and TDCR (0x1048) so that I can check the settings?
In order to change the frequency settings you will need to do the following:
Set the INIT (bit 0) and CCE (bit 1) to '1' in the CCCR register (0x1018). This require a couple of writes to get both the INIT and CCE bits set to '1' because of the protected bit status and CCE can only be set when INIT is equal to '1'. Therefore the first write sets the INIT bit, but since the INIT bit at the time of write was set to '0' the CCE bit does not take the new value and remains at '0'. Then a second write to the CCCR register will allow the CCE bit and other bits to take the new values because the INIT bit is '1' at the time of the write. You have mentioned that the CCCR register was 0x0303, so it appears that the INIT and CCE bits are getting set to allow configuration.
Once the CCCR register is set to allow initialization and configuration, you can write the new values to the NBTP, DBTP, and TDCR registers for the desired Nominal and FD Data rates.
Once you have written the new values to these registers (and any other registers in the device), you need to change the INIT and CCE bits back to '0' so that the device exits the initial mode state and enters the normal operation mode. If you are able to see device transmit data on the CAN bus, then the INIT and CCE bits in the CCCR register should be set to '0' and the CCCR register should be 0x0300.
This is the process. You mentioned "the programming sequence has no problem" so if that is true, the register NBTP, DBTP, and TDCR values must be set incorrectly. Can you verify that these registers are taking the values that are being written to them? If the INIT and CCE bits of the CCCR register are not set, the NBTP, DBTP adn TDCR registers will not take the new values and this could point to a sequence issue. But if these registers are taking the new values, then the NBTP, DBTP and TDCR register values are set incorrectly for the desired bit rates.
Once you provide me the register specific information, I can check the values for errors.
