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您好, 我这边已经收到美国工程师的答复, 关于中断解释的非常详细, 我把他的回复粘贴到这里, 就不做翻译了, 如果您哪里还有问题,我们可随时讨论:
The INT pin is pulled low whenever any input pin changes state, including when multiple pins change state. The INT signal is cleared/released upon a read from the Input Port register.*
Relating to your question, this means that, if the customer's application sees multiple inputs change at once, the INT pin will be pulled low, just like it would for any single input changing by itself. Once the byte is read from the Input Port register, the MCU will have received the data for all of the input ports on the TCA9534 P7-P0, and then the INT flag will clear.
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Let me try to make an example to see if this fits the application in question:
Let's say all pins P7-P0 are currently configured as inputs, and all of them are logic high. The INT pin will remain logic high while this remains true. Any read of register 0 will show the current states of these pins (ex. 0xFF).
If P0 falls low, the INT pin will also pull low. When the MCU reads register 0, it will receive 0xFE, since P0 is now low. After reading, INT is high again until the next change.
After this, let's say P3, P2, and P1 also all fall low at the same exact time. Here, INT will pull low until register 0 is read by the MCU. When the MCU reads register 0, it will receive 0xF0, and then INT will be high again.
*The INT pin also clears if the input pins change back to their original state before being read. In other words, if the MCU does not read register 0 before the input pin changes back, the INT pin will still be cleared. For in-depth timing considerations for interrupts, look at section 8.3.2 of the datasheet.