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tms320c6457的时钟电路可以吗?

Other Parts Discussed in Thread: SN74AVC1T45, CDCM6208

您好

看6457对时钟的要求(PLL1)是1.8V LVCMOS   100ps JITTER 45-55%占空比 +-100PPM稳定度 输入频率50-61.44MHz 最大PLL1.0GHZ

我的设计是恒温晶振出25.6MHZ(固定),经过AD8045放大 ,经CY2304倍频到51.2MHZ,经sn74avc1t45电平转换到1.8V

就Cy2304 :90 ps typical peak cycle-to-cycle jitter at 15 pF, 66 MHz

就sn74avc1t45 :500 Mbps (1.8-V to 3.3-V Translation)

不知道这样处理后对时钟稳定的影响对6457如何?满足要求吗?如有更好的解决方案请提供指导。

谢谢