Hello TI team，
I have some questions about TMUXHS4212 application, below is my planed backplane application schem, we get LVDS signal generated from Master/Host, the LVDS signal will trans/receive one-by-one and series all connectors. When we have modules insert to connector, Port A connect to Port C of TMUXHS4212, and Port A connect to Port B if no input modules insert in. My question are:
- In application, there may be many chips in series and each chip Port A connect to Port B, so can you help to guide how many chips can be in series for 100Mbsps LVDS signal? Will the trace length matters and how long can the trace be on backplane PCB?
- We have all the LVDS transceiverand receiver on input module connect to other module through board-board connector, than backplane trace and TUMXHS4212. In usually, we have 100Ω termination resistor between LVDS differential pair trace need receiver, my question is do we need extra AC couple capacitors and termination resistor near TUMXHS4212 and connector on backplane PCB?
- And if no any module insert in backplane, LVDS signal just go through all the seriated TUMXHS4212 chips’port A to port B, do we need extra AC couple capacitors and termination resistor near TUMXHS4212 and connector
on backplane PCB
