SN74LV8153-Q1: 在数据手册数据传输格式中,有以下要求。该芯片将串行数据转换为并行,只会将D0-D7转换吗?还是包括地址

Part Number: SN74LV8153-Q1


 The serial data should be sent as 2START-3ADDRESS-4DATA-1STOP. Two consecutive serial-data frames transmit 8 bits of data. The first frame includes the lower four bits of data (D0-D3), and the second frame includes the upper four bits (D4-D7). − The three address bits (in the consecutive frame) must be the same as those in the first frame; otherwise, the data will be dropped. − The order of the two start bits must be 0, then 1 in any frame; otherwise, the data rate will not be detected correctly. The period between the falling edge of the first start bit (ST0) and the rising edge of the second start bit (ST1) is measured to generate an internal-clock synchronized data stream.