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SN74ACT574: 芯片的输出情况

Carl Shen
Prodigy 200 points
Part Number: SN74ACT574

SN74ACT574PW这个芯片在第一次上电的时候，D没有输入，CP有个上升沿，OE低电平的时候，Q输出应该是低电平吧.但实际测试下来是高电平.如果除非上电初始化的时候先给CP信号锁存住一个高或者低.再OE才会输出高或者低.如果不去CP锁存的话 直接OE 默认的居然是输出高.我们想确认一下.芯片这个情况是不是正常的.

  • 0
    TI__Guru**** 295050 points

    您好,没有输入的情况下,输出有可能是高,有可能是低电平,也有可能输出振荡.

    参考这篇[FAQ] How does a slow or floating input affect a CMOS device?

    以及[FAQ] What is the default output of a latched device? (Flip-Flop, latch, register)

    e2e.ti.com/.../faq-how-does-a-slow-or-floating-input-affect-a-cmos-device

    e2e.ti.com/.../faq-what-is-the-default-output-of-a-latched-device-flip-flop-latch-register