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Hi Sir,
Please ref attach pic.
In our SPI topology CPU(1.8V) <=> TXB0304 <=> TS3A27518E(3.3V), SPI CLK is abnormal at TXB0304 output.
If we cut off SPI CLK between TXB0304 & TS3A27518E, then measurement at TXB0304 output side, it looks normal.
Ref application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) (ti.com), section "1.3 TXB Pullup and Pulldown Resistor Analysis":
Check abnormal waveform, it looks like there is PU & PD at TXB output side to TS3A27518E, then cause output Vol & Voh not at 0V & 3.3V,
but actually, our design is without PU/PD RES.
1. Check TS3A27518E datasheet, I can't find PU or PD data in datasheet, can you double check?
2. Do you have any comment for this issue?
Thanks~
Hi Vic,
This is the Chinese Forum. You can post in Chinese.
From the two waveforms you measured, TXB0304 seems to drive a large capacitive load. TS3A27518E has an on capacitance of 21.5pf. The TXB0304 does not work well with the added capacitance of long traces, connectors, or cables. Do other low speed signals of SPI look better than CLK?
An auto-bidirectional translator like the TXB (or TXS、LFS) cannot do buffering and has weak outputs. so you should use a direction-controlled translator like the SN74AXC4T774.
The next best alternative is to use a direction controlled translator such as the SN74AXC8T245. This has 8 channels on which you can control the direction of 4 channels at a time.