工具/软件:
嗨、我正在将 SPI 用于 TFT 显示器、我测量当我对 TX FIFO 已满进行轮询时、传输之间需要 1.5us 时间、如果我在没有轮询的情况下写入 TX FIFO 需要 100ns 时间、这是否正常? 我如何实现两次转账之间最少的时间?
for (;;) { vTaskDelay(pdMS_TO_TICKS(500)); SPI_Write_9bits(0x15); SPI_Write_9bits(0x14); SPI_Write_9bits(0x13); SPI_Write_9bits(0x12); vTaskDelay(pdMS_TO_TICKS(500)); DL_SPI_transmitData16(SPI_0_INST, 0x15); DL_SPI_transmitData16(SPI_0_INST, 0x15); DL_SPI_transmitData16(SPI_0_INST, 0x15); DL_SPI_transmitData16(SPI_0_INST, 0x15);*/ } void SPI_Write_9bits(uint16_t writeData) { while(DL_SPI_isTXFIFOFull(SPI_0_INST)){}; DL_SPI_transmitData16(SPI_0_INST, writeData); }
我还注意到、即使我设置 DL_SPI_FRAME_FORMAT_MOTO4_POL0_PHA1、在传输之间也不会阻止 CS 线路、这就是 SPI 配置:
static const DL_SPI_Config gSPI_0_config = { .mode = DL_SPI_MODE_CONTROLLER, .frameFormat = DL_SPI_FRAME_FORMAT_MOTO4_POL0_PHA1, .parity = DL_SPI_PARITY_NONE, .dataSize = DL_SPI_DATA_SIZE_9, .bitOrder = DL_SPI_BIT_ORDER_MSB_FIRST, .chipSelectPin = DL_SPI_CHIP_SELECT_0, }; static const DL_SPI_ClockConfig gSPI_0_clockConfig = {.clockSel = DL_SPI_CLOCK_BUSCLK, .divideRatio = DL_SPI_CLOCK_DIVIDE_RATIO_1}; SYSCONFIG_WEAK void SYSCFG_DL_SPI_0_init(void) { DL_SPI_setClockConfig(SPI_0_INST, (DL_SPI_ClockConfig *)&gSPI_0_clockConfig); DL_SPI_init(SPI_0_INST, (DL_SPI_Config *)&gSPI_0_config); DL_SPI_setBitRateSerialClockDivider(SPI_0_INST, 0); /* Enable module */ DL_SPI_enable(SPI_0_INST); }时钟为 80MHz、SPI 为 40MHz、我还使用 FreeRTOS。
提前感谢您
Rafael