[参考译文] TM4C1290NCPDT：#39出现 Tiva 问题；legacy SPI&#39；将工作代码从 TM4c123g 迁移到 TM4C1290时、FatFS 会抛出 FR_NOT_READY、可能是 SSI/SPI 配置问题

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1417919/tm4c1290ncpdt-tiva-problem-with-legacy-spi-migrating-working-code-from-tm4c123g-to-tm4c1290-fatfs-throws-fr_not_ready-likely-a-ssi-spi-config-problem

工具与软件：

在一个运行在 TM4C123GH6PM 和 TM4C123GHPGE 上的成熟代码库中、使用全部4个 SSI。   

我们正在添加对 TM4C1290NCPDT 的支持。  UART0、I2C0正常工作、但用于 MicroSD 卡/FatFS 的 SSI0不工作。

查看 Tiva 迁移文档： https://www.ti.com/lit/an/spma065/spma065.pdf、除了 PA4/PA5 TX/RX 角色外、在123G 和1290N 之间切换 SSI0方面没有什么特别突出的。

单步执行调用堆栈：

- fresult = f_opendir (&g_sDirObject、g_cCwdBuf)；   调用 disk_initialize  (spi)(在 microcat.c 中)

 - res = find_volume (&FS、&path、0)； 最终返回 FR_NOT_READY。   find_volume 调用 disk_initialize

 - stat = disk_initialize(fs->drv);/*初始化物理驱动器*/ disk_initialize   调用 power_on 设置 SSI。  请参见下文。

旧 SPI 映射：

123g   MISO=RX=PA4=SSI0_MISO      MOSI= 381=PA5=SSI0_MOSI       CLK= 4.2=SSI0_CLK    CS=PA3

1290：   MISO=RX=PA5=SSI0_DAT1      MOSI= 3024=PA4=SSI0_DAT0       CLK= 3.42=SSI0_CLK     CS= 3.453.

我想知道是否缺少有关 SSI0将代码从 TM4c123g 迁移到 TM4C1290n 的内容？

谢谢

在 diskio.c 中、平台绑定和 SSI 设置：

#ifdef PART_TM4C1290NCPDT
/* Peripheral definitions for TM4c1290N base serlog_msc3 board */
// SSI port
#define SDC_SSI_BASE SSI0_BASE
#define SDC_SSI_SYSCTL_PERIPH SYSCTL_PERIPH_SSI0

// GPIO for SSI pins
#define SDC_GPIO_PORT_BASE GPIO_PORTA_BASE
#define SDC_GPIO_SYSCTL_PERIPH SYSCTL_PERIPH_GPIOA
#define SDC_SSI_CLK GPIO_PIN_2
#define SDC_SSI_TX GPIO_PIN_4 //NOTE: RX/TX swapped vs TM4c123g per www.ti.com/.../spma065.pdf
#define SDC_SSI_RX GPIO_PIN_5
#define SDC_SSI_FSS GPIO_PIN_3
#define SDC_SSI_PINS (SDC_SSI_TX | SDC_SSI_RX | SDC_SSI_CLK | SDC_SSI_FSS)

#else
/* Peripheral definitions for TM4C123G board */
// SSI port
#define SDC_SSI_BASE SSI0_BASE
#define SDC_SSI_SYSCTL_PERIPH SYSCTL_PERIPH_SSI0

// GPIO for SSI pins
#define SDC_GPIO_PORT_BASE GPIO_PORTA_BASE
#define SDC_GPIO_SYSCTL_PERIPH SYSCTL_PERIPH_GPIOA
#define SDC_SSI_CLK GPIO_PIN_2
#define SDC_SSI_TX GPIO_PIN_5
#define SDC_SSI_RX GPIO_PIN_4
#define SDC_SSI_FSS GPIO_PIN_3
#define SDC_SSI_PINS (SDC_SSI_TX | SDC_SSI_RX | SDC_SSI_CLK | SDC_SSI_FSS)

#endif

static
void power_on (void)
{
/*
* This doesn't really turn the power on unless the hardware supports it, but initializes the
* SSI port and pins needed to talk to the card.
*/

/* Enable the peripherals used to drive the SDC on SSI */
ROM_SysCtlPeripheralEnable(SDC_SSI_SYSCTL_PERIPH);
ROM_SysCtlPeripheralEnable(SDC_GPIO_SYSCTL_PERIPH);

/*
* Configure the appropriate pins to be SSI instead of GPIO. The FSS (CS)
* signal is directly driven to ensure that we can hold it low through a
* complete transaction with the SD card.
*/
ROM_GPIOPinTypeSSI(SDC_GPIO_PORT_BASE, SDC_SSI_TX | SDC_SSI_RX | SDC_SSI_CLK);
ROM_GPIOPinTypeGPIOOutput(SDC_GPIO_PORT_BASE, SDC_SSI_FSS);

/*
* Set the SSI output pins to 4MA drive strength and engage the
* pull-up on the receive line.
*/
ROM_GPIOPadConfigSet(SDC_GPIO_PORT_BASE, SDC_SSI_RX, GPIO_STRENGTH_4MA,
GPIO_PIN_TYPE_STD_WPU);
ROM_GPIOPadConfigSet(SDC_GPIO_PORT_BASE, SDC_SSI_CLK | SDC_SSI_TX | SDC_SSI_FSS,
GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

/* Configure the SSI0 port */
// ROM_SSIConfigSetExpClk(SDC_SSI_BASE, ROM_SysCtlClockGet(),
// SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 400000, 8);
ROM_SSIConfigSetExpClk(SDC_SSI_BASE, g_ui32SysClock, //ROM_SysCtlClockGet() is not available on TM4C1290
SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 400000, 8);
ROM_SSIEnable(SDC_SSI_BASE);

/* Set DI and CS high and apply more than 74 pulses to SCLK for the card */
/* to be able to accept a native command. */
send_initial_clock_train();

/*-----------------------------------------------------------------------*/
/* Send 80 or so clock transitions with CS and DI held high. This is */
/* required after card power up to get it into SPI mode */
/*-----------------------------------------------------------------------*/
static
void send_initial_clock_train(void)
{
unsigned int i;
uint32_t ui32Dat;

/* Ensure CS is held high. */
DESELECT();

/* Switch the SSI TX line to a GPIO and drive it high too. */
ROM_GPIOPinTypeGPIOOutput(SDC_GPIO_PORT_BASE, SDC_SSI_TX);
ROM_GPIOPinWrite(SDC_GPIO_PORT_BASE, SDC_SSI_TX, SDC_SSI_TX);

/* Send 10 bytes over the SSI. This causes the clock to wiggle the */
/* required number of times. */
for(i = 0 ; i < 10 ; i++)
{
/* Write DUMMY data. SSIDataPut() waits until there is room in the */
/* FIFO. */
ROM_SSIDataPut(SDC_SSI_BASE, 0xFF);

/* Flush data read during data write. */
ROM_SSIDataGet(SDC_SSI_BASE, &ui32Dat);
}

/* Revert to hardware control of the SSI TX line. */
ROM_GPIOPinTypeSSI(SDC_GPIO_PORT_BASE, SDC_SSI_TX);
}