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[参考译文] ADC3120EVM-PDK:TLV320ADC3120IRTER Linux 文件

Guru**** 2867040 points
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1589740/adc3120evm-pdk-tlv320adc3120irter-linux-file

器件型号: ADC3120EVM-PDK

你(们)好

请提供 TLV320ADC3120IRTER Linux 文件

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、

    我们没有专门用于 ADC3120 的 Linux 驱动程序、但有一个适用于 ADC3140 的驱动程序、即 3120 的 4 通道版本。 所以、它应该除了输入通道 3 和 4 之外仍然可以工作。

    https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/sound/soc lv320adcx140.c

    https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/sound/soc lv320adcx140.h

    此致、
    Mir

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Jeffres、

    目前、MCLK 为 11.2MHz、BCLK 为 2.8MHz、FSYNC 为 44.1kHz、SDOUT 始终为低电平。 您能否查看寄存器?

    [   36.948602] reg 0x0  0x0
    [   36.951623] reg 0x1  0x0
    [   36.954154] reg 0x2  0x81
    [   36.956793] reg 0x3  0x0
    [   36.959337] reg 0x4  0x0
    [   36.961865] reg 0x5  0x5
    [   36.964409] reg 0x6  0x0
    [   36.966951] reg 0x7  0x40
    [   36.969565] reg 0x8  0x0
    [   36.972108] reg 0x9  0x0
    [   36.974636] reg 0xa  0x0
    [   36.977181] reg 0xb  0x0
    [   36.979722] reg 0xc  0x1
    [   36.982249] reg 0xd  0x2
    [   36.984814] reg 0xe  0x3
    [   36.987358] reg 0xf  0x4
    [   36.989887] reg 0x10  0x5
    [   36.992517] reg 0x11  0x6
    [   36.995146] reg 0x12  0x7
    [   36.997760] reg 0x13  0x2
    [   37.000390] reg 0x14  0x48
    [   37.003586] reg 0x15  0x44
    [   37.006290] reg 0x16  0x10
    [   37.009015] reg 0x17  0x0
    [   37.011644] reg 0x18  0x0
    [   37.014260] reg 0x19  0x0
    [   37.016901] reg 0x1a  0x0
    [   37.019531] reg 0x1b  0x0
    [   37.022146] reg 0x1c  0x0
    [   37.024776] reg 0x1d  0x0
    [   37.027407] reg 0x1e  0x0
    [   37.030022] reg 0x1f  0x40
    [   37.032737] reg 0x20  0x50
    [   37.035451] reg 0x21  0x0
    [   37.038066] reg 0x22  0x1
    [   37.040695] reg 0x23  0x0
    [   37.043324] reg 0x24  0x0
    [   37.045940] reg 0x25  0x0
    [   37.048568] reg 0x26  0x0
    [   37.051210] reg 0x27  0x0
    [   37.053826] reg 0x28  0x0
    [   37.056457] reg 0x29  0x0
    [   37.059085] reg 0x2a  0x0
    [   37.061699] reg 0x2b  0x45
    [   37.064416] reg 0x2c  0x67
    [   37.067131] reg 0x2d  0x0
    [   37.069746] reg 0x2e  0x0
    [   37.072375] reg 0x2f  0x0
    [   37.075003] reg 0x30  0x0
    [   37.077618] reg 0x31  0x0
    [   37.080247] reg 0x32  0x0
    [   37.082874] reg 0x33  0xff
    [   37.085576] reg 0x34  0x0
    [   37.088206] reg 0x35  0x0
    [   37.090832] reg 0x36  0x0
    [   37.093447] reg 0x37  0x0
    [   37.096076] reg 0x38  0x0
    [   37.098691] reg 0x39  0x0
    [   37.101325] reg 0x3a  0x0
    [   37.103953] reg 0x3b  0x60
    [   37.106655] reg 0x3c  0x0
    [   37.109286] reg 0x3d  0x0
    [   37.111914] reg 0x3e  0xc9
    [   37.114615] reg 0x3f  0x80
    [   37.117330] reg 0x40  0x0
    [   37.119958] reg 0x41  0x0
    [   37.122573] reg 0x42  0x0
    [   37.125202] reg 0x43  0xc9
    [   37.127916] reg 0x44  0x80
    [   37.130618] reg 0x45  0x0
    [   37.133247] reg 0x46  0x0
    [   37.135874] reg 0x47  0x0
    [   37.138489] reg 0x48  0xc9
    [   37.141206] reg 0x49  0x80
    [   37.143920] reg 0x4a  0x0
    [   37.146535] reg 0x4b  0x0
    [   37.149163] reg 0x4c  0x0
    [   37.151791] reg 0x4d  0xc9
    [   37.154492] reg 0x4e  0x80
    [   37.157207] reg 0x4f  0x0
    [   37.159834] reg 0x50  0x0
    [   37.162449] reg 0x51  0x0
    [   37.165078] reg 0x52  0xc9
    [   37.167792] reg 0x53  0x80
    [   37.170493] reg 0x54  0x0
    [   37.173121] reg 0x55  0x0
    [   37.175760] reg 0x56  0x0
    [   37.178375] reg 0x57  0xc9
    [   37.181092] reg 0x58  0x80
    [   37.183806] reg 0x59  0x0
    [   37.186420] reg 0x5a  0x0
    [   37.189049] reg 0x5b  0x0
    [   37.191678] reg 0x5c  0xc9
    [   37.194379] reg 0x5d  0x80
    [   37.197101] reg 0x5e  0x0
    [   37.199730] reg 0x5f  0x0
    [   37.202344] reg 0x60  0x0
    [   37.204977] reg 0x61  0xc9
    [   37.207690] reg 0x62  0x80
    [   37.210391] reg 0x63  0x0
    [   37.213021] reg 0x64  0x0
    [   37.215649] reg 0x65  0x0
    [   37.218262] reg 0x66  0x0
    [   37.220893] reg 0x67  0x0
    [   37.223521] reg 0x68  0x0
    [   37.226135] reg 0x69  0x0
    [   37.228767] reg 0x6a  0x0
    [   37.231395] reg 0x6b  0x1
    [   37.234010] reg 0x6c  0x40
    [   37.236729] reg 0x6d  0x7b
    [   37.239443] reg 0x6e  0x0
    [   37.242058] reg 0x6f  0x0
    [   37.244689] reg 0x70  0xe7
    [   37.247404] reg 0x71  0x0
    [   37.250017] reg 0x72  0x0
    [   37.252648] reg 0x73  0xf0
    [   37.255363] reg 0x74  0x0
    [   37.257978] reg 0x75  0xe0
    [   37.261172] reg 0x76  0xc0
    [   37.264381] reg 0x77  0xe0
    [   37.267108] reg 0x78  0x0
    [   37.269724] reg 0x79  0x0
    [   37.272361] reg 0x7a  0x0
    [   37.274989] reg 0x7b  0x40
    [   37.277691] reg 0x7c  0x0
    [   37.280319] reg 0x7d  0x0
    [   37.282946] reg 0x7e  0x0
    [   37.285560] reg 0x7f  0x0
    

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    尊敬的 Kevin:

    由于假期,我的回复将延迟几天。 我会很快浏览寄存器、然后返回到这里。

    -米尔

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、

    我浏览了寄存器、似乎可以进行操作、但假设有 4 个通道、因此所有 4 个通道都加电、并且 BCLK 与 FSYNC 之比设置为 64(寄存器 0x15)。 SDOUT 处于低电平可能来自寄存器 0x74、其中所有输出时隙都处于 tri 状态、即未启用。 启用输出可能是 DTS 中缺少的设置、也可能是 alsamixer GUI 中缺少的设置。 请检查这些,如果你能把它们发送到这里,我会看一下。 我将在您的注册表上附上我的注释。 请注意、有许多寄存器是“保留“或设置的、数据表中未提及、这些寄存器仅适用于 ADC3140、而不是 3120。 但是、它应该不会影响操作。

    0x00  0x0 #page 0
    0x01  0x0 #do not reset 
    0x02  0x81 #areg is internal generated, device not in sleep mode
    0x03  0x0 
    0x04  0x0
    0x05  0x5 #default
    0x06  0x0
    0x07  0x40 #i2s, 16 bit
    0x08  0x0
    0x09  0x0
    0x0a  0x0
    0x0b  0x0
    0x0c  0x1
    0x0d  0x2
    0x0e  0x3 #should be last reg for slot nums but is not
    0x0f  0x4
    0x10  0x5
    0x11  0x6
    0x12  0x7
    0x13  0x2 #slave mode, auto clocking, 48k multiple (default)
    0x14  0x48 #defaults, 48k
    0x15  0x44 #!!detected sample rate=48k, 64 bclk to fsync ratio (slightly interesting, means it is 16 bit plus 16 bits of silence)
    0x16  0x10 #defaults
    0x17  0x0
    0x18  0x0
    0x19  0x0
    0x1a  0x0
    0x1b  0x0
    0x1c  0x0
    0x1d  0x0
    0x1e  0x0
    0x1f  0x40 #def
    0x20  0x50 #def
    0x21  0x0 #no gpio1
    0x22  0x1 #gpo1 disabled, active low and active high
    0x23  0x0
    0x24  0x0
    0x25  0x0
    0x26  0x0
    0x27  0x0
    0x28  0x0
    0x29  0x0
    0x2a  0x0
    0x2b  0x45 #gpi1 is pdm data input for ch 1 and 2 pdmdin1, gpi2 is pdm data input for ch3 and 4 pdmdin2
    0x2c  0x67 #reserved
    0x2d  0x0
    0x2e  0x0
    0x2f  0x0
    0x30  0x0
    0x31  0x0
    0x32  0x0 
    0x33  0xff #def
    0x34  0x0 #no interrupts
    0x35  0x0
    0x36  0x0
    0x37  0x0
    0x38  0x0
    0x39  0x0
    0x3a  0x0
    0x3b  0x60 #micbias is set to avdd
    0x3c  0x0
    0x3d  0x0
    0x3e  0xc9 #default. 0db dig volume control
    0x3f  0x80 #default. gain=0db
    0x40  0x0
    0x41  0x0
    0x42  0x0
    0x43  0xc9 #default ch2 dig volume control =0db
    0x44  0x80 #gain=0db ch2
    0x45  0x0
    0x46  0x0
    0x47  0x0
    0x48  0xc9
    0x49  0x80
    0x4a  0x0
    0x4b  0x0
    0x4c  0x0
    0x4d  0xc9
    0x4e  0x80
    0x4f  0x0
    0x50  0x0
    0x51  0x0
    0x52  0xc9
    0x53  0x80
    0x54  0x0
    0x55  0x0
    0x56  0x0
    0x57  0xc9
    0x58  0x80
    0x59  0x0
    0x5a  0x0
    0x5b  0x0
    0x5c  0xc9
    0x5d  0x80
    0x5e  0x0
    0x5f  0x0
    0x60  0x0
    0x61  0xc9
    0x62  0x80
    0x63  0x0
    0x64  0x0
    0x65  0x0
    0x66  0x0
    0x67  0x0
    0x68  0x0
    0x69  0x0
    0x6a  0x0
    
    0x6b  0x1 #default. linear phase dec filters, hpf with cutoff of 12 hz selected
    0x6c  0x40 #default.
    0x6d  0x7b #reserved
    0x6e  0x0
    0x6f  0x0
    0x70  0xe7 #default. agc
    0x71  0x0
    0x72  0x0
    0x73  0xf0 #ch1-4 enabled
    0x74  0x0 #!!ch1-4 output slots in tri-state (not enabled)
    0x75  0xe0 #powered up micbias, adc and pdm channels, pll
    0x76  0xc0 #adc ch1 and 2 powered up
    0x77  0xe0 #device in active mode
    0x78  0x0
    0x79  0x0
    0x7a  0x0
    0x7b  0x40 #reserved
    0x7c  0x0
    0x7d  0x0
    0x7e  0x0
    0x7f  0x0

    此致、
    Mir