This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[参考译文] TLV320AIC3101:platform sound-tlv320aic310x:延迟探头等待 |TLV320AIC3101

Guru**** 1740850 points
Other Parts Discussed in Thread: TLV320AIC3101
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1319486/tlv320aic3101-platform-sound-tlv320aic310x-deferred-probe-pending-tlv320aic3101

器件型号:TLV320AIC3101

root@imx8mp-LPDDR4-EVK:~#[23.529459]  platform sound-tlv320aic310x:延迟探头挂起

root@imx8mp-LPDDR4-EVK:~# i2cdetect -y 2
0 1 2 3 4 5 6 7 8 9 a b c d e f
00:------- ----
10:------- 18岁以下 ——
第20章:你是我的女人 ------- -------
30:------- ------- ------- --
40:-------------- ------- ------- --
50:------- ------- ------- --
60:------- ------- ------- --
70:------- ----
root@imx8mp-LPDDR4-EVK:~# i2cdump -f -y 2 0x18                                                                                   
未指定大小(使用字节数据访问)
   0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef   
00:00 00 00 10 04 00 00 00 00 00 00 00 01 00 00 00 80  ...?... ?...?
10: 80 ff 78 78 78 78 78 78 06 00分00分00分00分00  。xxxxxx。
20:20 04 00 00 00 00 00 00 00 00 80 00 00 00 00  ?......... ??...
30:00 00 00 04 00 00 00 00 00 00 00 04 00 00 00 00 00  ...?... ?……
40:00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00 00…  … ?………
50:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  .
60:00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ... .........
70:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  .
80:00 00 00 10 04 00 00 00 00 00 00 00 01 00 00 00 80  ...?... ?...?
90: 80 ff 78 78 78 78 78 78 06 00分00分00分00分00  。xxxxxx。
A0:20 04 00 00 00 00 00 00 00 00 00 80 00 00 00 00  ?......... ??...
B0:00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00  ...?... ?……
C0:00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00 00…  … ?………
D0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  .
E0:00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00  ... .........
F0:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  .


root@imx8mp-LPDDR4-evk:/lib/modules/6.1.55 +g593a3d788681/kernel/sound/codecs# soc ls
SND-SND-V320aic31xx.ko SND-320aic3x-tlv320aic3x.ko soc  soc

sound-tlv320aic310x {
152 compatible ="简单音频卡";
153 simple-audio-card, name ="sound-tlv320aic310x";
154 simple-audi-CARD、format ="I2S";
155 simple-audio-card、frame-master =<&cpudai2>;
156 simple-audio-card,bitclock-master =<&cpudai2>;
157 simple-audio-card、MCLK-FS =<256>;
158 simple-audio-card、widget =
159 "线路"、"线路输入"、
160 "扬声器"、"扬声器"、
161 "麦克风"、"麦克风插孔"、
162 "耳机"、"耳机插孔";
163 simple-audio-card,路由=
164 "扬声器"、"SPOP"、
165 "扬声器"、"SPOM"、
166 "耳机插孔"、"HPLOUT"、
167 "耳机插孔"、"HPROUT"、
168 "LINE1L"、"线路输入"、
169 "LINE1R"、"Line In"、
170 "MIC3R"、"麦克风插孔"、
171 "麦克风插孔"、"麦克风偏置";
172
173 cpudai2:simple-audi-Card,cpu {
174 sound-dai =<&sa3>;
175 };
176简单音频卡、编解码器{
177 sound-dai =<&codec>;
178个时钟=<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
179 };
180 };

编解码器:编解码器@18{
676 #sound-Da-cells=<0>;
677 pinctrl-names ="默认";
678 pinctrl-0 =<&pinctrl_tlv320>;
679 compatible ="ti, tlv320aic3101";
680 reg =<0x18>;
681时钟=<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
682个时钟名称="mclk1";
683 RESET-GPIO =<&GPIO1 10 GPIO_ACTIVE_LOW>;
684 AVDD 电源=<&buck4>;
685 IOVDD 电源=<&buck5>;
686 DRVDD 电源=<&buck4>;
687 DVDD-SUPPLY =<&buck5>;
688 };
说3 (&S){
914 #sound-Da-cells =<0>;
915 pinctrl-names ="默认值";
916 pinctrl-0 =<&pinctrl_sai3>;
917个分配的时钟=<&clk IMX8MP_CLK_SAI3>;
918 Assigned-Clock-Parents =<&clk IMX8MP_AUDIO_PLL1_OUT>
919指定时钟速率=<12288000>;
920 Clocks =<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG>、<&clk IMX8MP_CLK_dummy>
921 <&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>、<&clk IMX8MP_CLK_DUEME>
922 <&clk IMX8MP_CLK_dummy>、<&clk IMX8MP_AUDIO_PLL1_OUT>、<&clk IMX8MP_AUDIO_PLL2_OUT>;
923时钟名称="bus"、"mclk0"、"mclk1"、"mclk2"、"mclk3"、 "pll8k"、"pll11k";
924 FSL,SAI-synchronous 接收器;
925 status ="可以";
926 };
pinctrl_tlv320:tlv320grp{
1291 FSL、引脚=<
1292 MX8MP_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16
1293 >;
1294 };
1295
1296 pinctrl_sai3:sai3grp{
1297 FSL、引脚=<
1298 MX8MP_IOMUXC_SAI3_TXFS_AUDIOMIX_SAI3_TX_SYNC 0xd6
1299 MX8MP_IOMUXC_SAI3_TXC_AUDIOMIX_SAI3_TX_BCLK 0xd6
1300 MX8MP_IOMUXC_SAI3_RXD_AUDIOMIX_SAI3_RX_DATA00 0xd6
1301 MX8MP_IOMUXC_SAI3_TXD_AUDIOMIX_SAI3_TX_DATA00 0xd6
1302 MX8MP_IOMUXC_SAI3_MCLK_AUDIOMIX_SAI3_MCLK 0xd6
1303 MX8MP_IOMUXC_SAI3_RXFS_GPIO4_IO28 0xd6
1304 MX8MP_IOMUXC_SAI3_RXC_GPIO4_IO29 0xd6
1305 >;
1306 };

如果需要在 DTS 中进行任何更改、请指导我。



  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    请告诉我您下载驱动程序的位置。

    您是否成功注册了声卡?

    请运行以下命令并与我共享日志。

    # ls /dev/snd

    # ls /sys/bus/i2c/devices/2- 0018  

    # cat proc/asound/PCM

    # cat proc/asound/卡

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    感谢您的答复。

    我将使用 Yocto 生成的 imx8mp、该驱动程序在构建中提供了默认值。 设置为启用。
    CONFIG_SND_SOC_TLV320AIC31XX=m
    CONFIG_SND_SOC_TLV320AIC32X4 = m
    CONFIG_SND_SOC_TLV320AIC32X4_I2C=m
    # CONFIG_SND_SOC_TLV320AIC32X4_SPI 未设置
    CONFIG_SND_SOC_TLV320AIC3X=m
    CONFIG_SND_SOC_TLV320AIC3X_I2C=m
    root@imx8mp-LPDDR4-EVK:~ ls /dev/snd
    副路径/ controlC0 controlC1 pcmC0D0c pcmC0D0p pcmC1D0p 计时器
    root@imx8mp-LPDDR4-EVK:~ ls /sys/bus/i2c/devices
    0-0025/1-003c/1-003d/1-004C/1-0050/2-0018/ 2-0020/ i2c-0/i2c-1/i2c-2/ i2c-6/
    root@imx8mp-LPDDR4-EVK:~ cat /proc/asound/pcm
    00-00:30c20000.SAI-bt-SCO-PCM-WB-20000:30cWB.SAI-bt-PCM-WB-0:30cWB.SAI-bt-SCO-PCM-WB bt-SCO-WB-20000:Playback 1: Capture 1
    01-00:I. MX HDMI I2S-hif-0:i. MX HDMI I2S-HIFI-0:播放1
    root@imx8mp-LPDDR4-EVK:~ cat /proc/asound/cards
    0 [btscoaudio ]: simple-card - bt-sco-audio
    BT-SCO 音频
    1 [audiohdmi ]: audio-hdmi - audio-hdmi
    音频- HDMI

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您是否  使用了 tlv320aic310x 驱动程序?

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    是的、我做过  
    root@imx8mp-LPDDR4-evk:/lib/modules/6.1.55 +g593a3d788681/kernel/sound/codecs# soc insmod snd-rtlv320aic31xx.ko soc
    insmod:错误:无法插入模块 snd-crypt-tlv320aic31xx.ko soc:文件存在
    root@imx8mp-LPDDR4-evk:/lib/modules/6.1.55 +g593a3d788681/kernel/sound/codecs# soc

    需要进行哪些更改?  

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    请给我一个有关 imx8mp 的参考配置设置、用于 Yocto 构建

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    在 tlv320aic31xx.c 中、  

    静态常量结构 i2c_device_id aic31xx_i2c_id[]={{
    "tlv320aic310x"AIC3100}、
    "tlv320aic311x"AIC3110}、
    {"TLV320AIC3100"、 AIC3100}、
    "tlv320aic3110"AIC3110}、
    "tlv320aic3120"AIC3120}、 
    "TLV320AIC3111"AIC3111}、
    
    {"tlv320dac3100"、DAC3100}、{"tlv320dac3101"DAC3101 }、
    {}}
    
    因此兼容性="ti, tlv320aic3101"在 DTS 文件中,应兼容="ti, tlv320aic310x"。
    因为
    aic31xx_i2c_id 中没有 ti、tlv320aic3101
    [quote userid="592747" url="~/support/audio-group/audio/f/audio-forum/1319486/tlv320aic3101-platform-sound-tlv320aic310x-deferred-probe-pending-tlv320aic3101编解码器:codec@18 {
    676 #sound-Da-cells=<0>;
    677 pinctrl-names ="默认";
    678 pinctrl-0 =<&pinctrl_tlv320>;
    679 compatible ="ti, tlv320aic3101";
    680 reg =<0x18>;
    681时钟=<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
    682个时钟名称="mclk1";
    683 RESET-GPIO =<&GPIO1 10 GPIO_ACTIVE_LOW>;
    684 AVDD 电源=<&buck4>;
    685 IOVDD 电源=<&buck5>;
    686 DRVDD 电源=<&buck4>;
    687 DVDD-SUPPLY =<&buck5>;
    688 };
  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    更改 dtb 之后

    root@imx8mp-LPDDR4-evk:~# dmesg | grep "tlv"
    [ 11.686934] tlv320aic31xx-codec 2-0018:错误-EBUSY:无法获取 GPIO
    [ 11.702045] tlv320aic31xx-codec:2-0018探测器失败,错误-16
    [12.225713] of:/sound-tlv320aic310x/simple-audio-card, cpu: Could not get #sound-da-cells for / soc@0/bus@30c0000000/spba-bus@30c000/sai@30c30000
    [ 12.239538] ASOC-simple-card sound-tlv320aic310x: error -EINVAL: parse error (ASOC-simple-card sound-tlv320aic310x:错误-EINVAL:解析错误)
    [12.253095] asoc-simple-card: probe of sound-tlv320aic310x 失败,错误-22
    root@imx8mp-LPDDR4-EVK:~#

    sound-tlv320aic310x {
    152 compatible ="简单音频卡";
    153 simple-audio-card, name ="sound-tlv320aic310x";
    154 simple-audi-CARD、format ="I2S";
    155 simple-audio-card、frame-master =<&cpudai2>;
    156 simple-audio-card,bitclock-master =<&cpudai2>;
    157 simple-audio-card、MCLK-FS =<48>;
    158 simple-audio-card、widget =
    159 "线路"、"线路输入"、
    160 "扬声器"、"扬声器"、
    161 "麦克风"、"麦克风插孔"、
    162 "耳机"、"耳机插孔";
    163 simple-audio-card,路由=
    164 "扬声器"、"SPOP"、
    165 "扬声器"、"SPOM"、
    166 "耳机插孔"、"HPLOUT"、
    167 "耳机插孔"、"HPROUT"、
    168 "LINE1L"、"线路输入"、
    169 "LINE1R"、"Line In"、
    170 "MIC3R"、"麦克风插孔"、
    171 "麦克风插孔"、"麦克风偏置";
    172
    173 cpudai2:simple-audi-Card,cpu {
    174 sound-dai =<&sa3>;
    175 };
    176简单音频卡、编解码器{
    177 sound-dai =<&codec>;
    178个时钟=<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
    179 };
    180 };
    674编解码器:编解码器@18{
    675#sound-Di-Cells=<0>;
    676 pinctrl-names ="默认值";
    677 pinctrl-0 =<&pinctrl_tlv320>;
    678兼容="ti, tlv320aic310x";
    679 reg =<0x18>;
    680时钟=<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
    681个时钟名="mclk1";
    682 RESET-GPIO =<&GPIO1 10 GPIO_ACTIVE_LOW>;
    683 AVDD-SUPPLY =<&buck4>;
    684 IOVDD 电源=<&buck5>;
    685 DRVDD 电源=<&buck4>;
    686 DVDD 电源=<和 buck5>;
    687 };
    说3 (&S){
    913 pinctrl-names ="默认";
    914 pinctrl-0 =<&pinctrl_sai3>;
    915分配的时钟=<&clk IMX8MP_CLK_SAI3>;
    916已分配时钟父项=<&clk IMX8MP_AUDIO_PLL1_OUT>
    917指定时钟速率=<12288000>;
    918 Clocks =<&AUDIO_blk_CTRL IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG>、<&clk IMX8MP_CLK_DUEME>
    919 <&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>、<&clk IMX8MP_CLK_DUEME>
    920 <&clk IMX8MP_CLK_dummy>
    921 Clock-names ="bus"、"mclk0"、"mclk1"、"mclk2"、"mclk3";
    922 FSL,SAI-MCLK 方向输出;
    923状态="可以";
    924 };
    pinctrl_tlv320:tlv320grp{
    1263 FSL、pins =<
    1264 MX8MP_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16
    1265 >;
    1266 };
    1267
    1268 pinctrl_sai3:sai3grp{
    1269 FSL、引脚=<
    1270 MX8MP_IOMUXC_SAI3_TXFS_AUDIOMIX_SAI3_TX_SYNC 0xd6
    1271 MX8MP_IOMUXC_SAI3_TXC_AUDIOMIX_SAI3_TX_BCLK 0xd6
    1272 MX8MP_IOMUXC_SAI3_RXD_AUDIOMIX_SAI3_RX_DATA00 0xd6
    1273 MX8MP_IOMUXC_SAI3_TXD_AUDIOMIX_SAI3_TX_DATA00 0xd6
    1274 MX8MP_IOMUXC_SAI3_MCLK_AUDIOMIX_SAI3_MCLK 0xd6
    1275 MX8MP_IOMUXC_SAI3_RXFS_GPIO4_IO28 0xd6
    1276 MX8MP_IOMUXC_SAI3_RXC_GPIO4_IO29 0xd6
    1277 >;
    1278 };


  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    根据日志、驱动程序中的 i2c probe 函数已被调用、请检查 dts 中的 GPIO 设置、它与您的硬件连接高度相关。

    [ 11.686934] tlv320aic31xx-codec 2-0018:错误-EBUSY:无法获取 GPIO

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    1 sound-tlv320aic310x {
    152 compatible ="简单音频卡";
    153 simple-audio-card, name ="sound-tlv320aic310x";
    154 simple-audi-CARD、format ="I2S";
    155 simple-audio-card、bitclock-master =<&cpudai2>;
    156 simple-audio-card、frame-master =<&cpudai2>;
    157 simple-audio-card、MCLK-FS =<256>;
    158 simple-audio-card、widget =
    159 "麦克风"、"麦克风插孔"、
    160 "线路"、"线路输入插孔"、
    161 "线路"、"线路输出插孔"、
    162 "耳机"、"耳机插孔"、
    163"扬声器"、"扬声器外部";
    164简单音频卡、路由=
    165 "耳机插孔"、"HPLOUT"、
    166 "耳机插孔"、"HPROUT";
    167 cpudai2:simple-audi-Card,cpu {
    168 sound-dai =<&sa3>;
    169 };
    170简单音频卡、编解码器{
    171 sound-dai =<&codec>;
    172 Clocks =<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
    173 };
    174 };

    660 &i2c3{
    661时钟频率=<400000>;
    662 pinctrl-names ="默认值"、"GPIO";
    663 pinctrl-0 =<&pinctrL_i2c3>;
    664状态="正常";
    665
    666编解码器:编解码器@18{
    667#sound-Da-cells=<0>;
    668 pinctrl-names ="默认";
    669 pinctrl-0 =<&pinctrl_tlv320>;
    670兼容="ti, tlv320aic3x";
    671 reg =<0x18>;
    672 RESET-GPIO =<&GPIO1 10 GPIO_ACTIVE_LOW>;
    673 IOVDD 电源=<&buck5>;
    674 DVDD-SUPPLY =<&buck5>;
    675 AVDD 电源=<&buck4>;
    676 DRVDD-supply =<&buck4>;
    677 };
    678
    说3 (&S){
    903 #sound-da-cells =<0>;
    904 pinctrl-names ="默认";
    905 pinctrl-0 =<&pinctrl_sai3>;
    906分配的时钟=<&clk IMX8MP_CLK_SAI3>;
    907 Assigned-Clock-Parents =<&clk IMX8MP_AUDIO_PLL1_OUT>
    908指定时钟速率=<12288000>;
    909 Clocks =<&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG>、<&clk IMX8MP_CLK_dummy>
    910 <&AUDIO_blk_Ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>、<&clk IMX8MP_CLK_DUEME>
    911 <&clk IMX8MP_CLK_dummy>、<&clk IMX8MP_AUDIO_PLL1_OUT>、<&clk IMX8MP_AUDIO_PLL2_OUT>;
    912个时钟名称="BUS"、"mclk0"、"mclk1"、"mclk2"、"mclk3"、 "pll8k"、"pll11k";
    913 FSL、SAI-synchronous 接收器;
    914状态="正常";
    915 };

    pinctrl_tlv320:tlv320grp{
    1254 FSL、引脚=<
    1255 MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x00
    1256 >;
    1257 };
    1258
    1259 pinctrl_sai3:sai3grp{
    1260 FSL、引脚=<
    1261 MX8MP_IOMUXC_SAI3_TXFS_AUDIOMIX_SAI3_TX_SYNC 0xd6
    1262 MX8MP_IOMUXC_SAI3_TXC_AUDIOMIX_SAI3_TX_BCLK 0xd6
    1263 MX8MP_IOMUXC_SAI3_RXD_AUDIOMIX_SAI3_RX_DATA00 0xd6
    1264 MX8MP_IOMUXC_SAI3_TXD_AUDIOMIX_SAI3_TX_DATA00 0xd6
    1265 MX8MP_IOMUXC_SAI3_MCLK_AUDIOMIX_SAI3_MCLK 0xd6
    1266 MX8MP_IOMUXC_SAI3_RXFS_GPIO4_IO28 0xd6
    1267 MX8MP_IOMUXC_SAI3_RXC_GPIO4_IO29 0xd6
    1268 >;
    1269 };

    root@imx8mp-LPDDR4-evk:~# aplay -l
    ****播放硬件设备列表****
    卡0:btscoaudio [bt-SCO-AUDIO]、设备0:30c2000.SAI-bt-SCO-PCM-WB bt-SCO-PCM-WB-0 [30c2000.SAI-bt-SCO-PCM-WB bt-SCO-PCM-WB-0]
    子器件:1/1
    子设备#0:子设备#0
    卡1:soundtlv320aic3 [sound-tlv320aic310x],device 0:30c30000.SAI-tlv320aic3x-hifi tlv320aic3x-hifi-0[30c30000.SAI-tlv320aic3x-hifi tlv320aic3x-hifi-0]
    子器件:1/1
    子设备#0:子设备#0
    卡2:audiohdmi [audio-hdmi],设备0:i. MX HDMI I2S-hif-0 [I. MX HDMI I2S-HIFI-0]
    子器件:1/1
    子设备#0:子设备#0
    root@imx8mp-LPDDR4-EVK:~#

    我们不能听音乐,但我们可以听一些总线声音  

    root@imx8mp-LPDDR4-EVK:~# aplay -f S16_LE -c 1 -r 48000 --device plughw:1.0 Rear_Center.wav
    播放波形"48000Hz.wav":有符号16位小端字节序、速率 Rear_Center、单声道
    ^接收信号中断...
    Aplay:PCM_WRITE:2127:写入错误:中断的系统调用
    root@imx8mp-LPDDR4-EVK:~# aplay -f S16_LE -c 2 -r 8000 --device plughw:1.0 Rear_Center .wav
    播放波形"48000Hz.wav":有符号16位小端字节序、速率 Rear_Center、单声道
    ^接收信号中断...
    Aplay:PCM_WRITE:2127:写入错误:中断的系统调用
    root@imx8mp-LPDDR4-EVK:~#
    root@imx8mp-LPDDR4-EVK:~#

    [ 1740.322659] FSL-SAI 30c3000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22
    [ 1740.331071] 30c3000.si-tlv320aic3x-hifi:ASOC:30c30000.si-tlv320aic3x-hifi 上的_ SoC_PCM_HW_params 处出错:-22
    [1740.344818] FSL-SAI 30c30000.SAI:无法推导所需的 Rx 速率:1411200
    [ 1740.351902] FSL-SAI 30c30000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22
    [ 1740.360301] 30c30000.SAI-tlv320aic3x-hifi:ASOC:30c30000.SAI-tlv320aic3x-hifi 上_ SoC_PCM_HW_params 处出错:-22
    [1740.371158] FSL-SAI 30c3000.SAI:无法推导所需的 Rx 速率:1411200
    [ 1740.378237] FSL-SAI 30c3000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22
    [ 1740.386635] 30c3000.SAI-tlv320aic3x-hifi:ASOC:在30c30000.SAI-tlv320aic3x-hifi 上的_SoC_PCM_HW_params 处出错:-22
    [1740.397486] FSL-SAI 30c3000.SAI:未能推导出所需的 Rx 速率:1411200
    [ 1740.404569] FSL-SAI 30c30000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22
    [ 1740.412972] 30c3000.SAI-tlv320aic3x-hifi:ASOC:30c30000.SAI-tlv320aic3x-hifi 上的_ SoC_PCM_HW_params 处出错:-22
    [1740.423770] FSL-SAI 30c3000.SAI:无法推导所需的 Rx 速率:1411200
    [ 1740.430851] FSL-SAI 30c3000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22
    [ 1740.439251] 30c3000.si-tlv320aic3x-hifi:ASOC:30c30000.si-tlv320aic3x-hifi 上的_ SoC_PCM_HW_params 处出错:-22
    [1740.450095] FSL-SAI 30c3000.SAI:无法得出所需的 Rx 比率:1411200
    [1740.457177] FSL-SAI 30c3000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22
    [ 1740.465576] 30c3000.si-tlv320aic3x-hifi:ASOC:在30c30000.si-tlv320aic3x-hifi 的_ SoC_PCM_HW_params 上出错:-22
    [1740.479482] FSL-SAI 30c3000.SAI:无法推导所需的 Rx 速率:1411200
    [ 1740.486571] FSL-SAI 30c3000.SAI:ASOC:30c3000.SAI 上的 SND_SoC_DAI_HW_PARAMS 错误:-22

    如果需要在 DTB 中进行任何更改、请帮助我们

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    请根据示波 器检查 I2S clk (bit clk 和 ws clk)并上传波形至此处、DTS 设置显示 tlv320aic3101是从设备、它取决于来自平台的 clk。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    MCLK 无信号
    BCLK 频率不稳定高电压为1.8
    Wclk 频率不稳定高电压为1.8

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    root@imx8mp-LPDDR4-evk:~# grep -E"Cock|sa3"/sys/kernel/debug/clk/clk_summary
    时钟计数计数计数速率精度相位周期启用
    SAI3_MCLK 0 0 0 0 0 0 0 50000年
    Sai3_mclk3_clk 0 0 0 49152000 0 0 50000 N
    sai3_mclk2_sel 0 0 0 24000000 0 50000 Y
    sai3_mclk2_clk 0 0 0 24000000 0 50000 N
    Sai3_IPG_clk 1 1 0 400000000 0 50000 Y
    SAL3 1 1 0 12288000 0 50000 Y
    SAISA3_ROOT 1 1 0 12288000 0 0 50000 Y
    SAI3_mclk1_SEL 1 0 12288000 0 50000 Y
    SAI3_mclk1_clk 2 0 12288000 0 50000 Y
    root@imx8mp-LPDDR4-EVK:~#

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    /*
     * Copyright 2019 NXP
     */
    
    /dts-v1/;
    
    #include <dt-bindings/phy/phy-imx8-pcie.h>
    #include <dt-bindings/usb/pd.h>
    #include "imx8mp.dtsi"
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/sound/tlv320aic31xx.h>
    / {
    	model = "NXP i.MX8MPlus EVK board";
    	compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
    
    	chosen {
    		stdout-path = &uart2;
    	};
    
    	gpio-leds {
    		compatible = "gpio-leds";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_gpio_led>;
    
    		status {
    			label = "yellow:status";
    			gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
    			default-state = "on";
    		};
    	};
    
    	memory@40000000 {
    		device_type = "memory";
    		reg = <0x0 0x40000000 0 0xc0000000>,
    		      <0x1 0x00000000 0 0xc0000000>;
    	};
    
    	pcie0_refclk: pcie0-refclk {
    		compatible = "fixed-clock";
    		#clock-cells = <0>;
    		clock-frequency = <100000000>;
    	};
    
    	reg_can1_stby: regulator-can1-stby {
    		compatible = "regulator-fixed";
    		regulator-name = "can1-stby";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_flexcan1_reg>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		gpio = <&gpio5 5 GPIO_ACTIVE_HIGH>;
    		enable-active-high;
    	};
    
    	reg_can2_stby: regulator-can2-stby {
    		compatible = "regulator-fixed";
    		regulator-name = "can2-stby";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_flexcan2_reg>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
    		enable-active-high;
    	};
    
    	reg_pcie0: regulator-pcie {
    		compatible = "regulator-fixed";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_pcie0_reg>;
    		regulator-name = "MPCIE_3V3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
    		enable-active-high;
    		regulator-always-on;
    	};
    
    	reg_usb_vbus: regulator-vbus {
    		compatible = "regulator-fixed";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_usb1_vbus>;
    		regulator-name = "USB_VBUS";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
    		enable-active-high;
    		regulator-always-on;
    	};
    
    	reg_usdhc2_vmmc: regulator-usdhc2 {
    		compatible = "regulator-fixed";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
    		regulator-name = "VSD_3V3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
    		enable-active-high;
    	};
    
    	reg_audio_pwr: regulator-audio-pwr {
    		compatible = "regulator-fixed";
    		regulator-name = "audio-pwr";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
    		enable-active-high;
    		regulator-always-on;
    	};
    
    	bt_sco_codec: bt_sco_codec {
    		#sound-dai-cells = <1>;
    		compatible = "linux,bt-sco";
    	};
    
    	sound-bt-sco {
    		compatible = "simple-audio-card";
    		simple-audio-card,name = "bt-sco-audio";
    		simple-audio-card,format = "dsp_a";
    		simple-audio-card,bitclock-inversion;
    		simple-audio-card,frame-master = <&btcpu>;
    		simple-audio-card,bitclock-master = <&btcpu>;
    
    		btcpu: simple-audio-card,cpu {
    			sound-dai = <&sai2>;
    			dai-tdm-slot-num = <2>;
    			dai-tdm-slot-width = <16>;
    		};
    
    		simple-audio-card,codec {
    			sound-dai = <&bt_sco_codec 1>;
    		};
    	};
    
    	sound-hdmi {
    		compatible = "fsl,imx-audio-hdmi";
    		model = "audio-hdmi";
    		audio-cpu = <&aud2htx>;
    		hdmi-out;
    		constraint-rate = <44100>,
    				<88200>,
    				<176400>,
    				<32000>,
    				<48000>,
    				<96000>,
    				<192000>;
    		status = "okay";
    	};
    	
    	sound-tlv320aic310x {
                    compatible = "simple-audio-card";
                    simple-audio-card,name = "sound-tlv320aic310x";
                    simple-audio-card,format = "i2s";
                    simple-audio-card,bitclock-master = <&cpudai2>;
    		simple-audio-card,frame-master = <&cpudai2>;
    		simple-audio-card,mclk-fs = <256>;
    		simple-audio-card,widgets =
    			"Microphone", "Microphone Jack",
    			"Line", "Line In Jack",
    			"Line", "Line Out Jack",
    			"Headphone", "Headphone Jack",
    			"Speaker", "Speaker External";
    		simple-audio-card,routing =
    			"Headphone Jack", "HPLOUT",
    			"Headphone Jack", "HPROUT";
    		cpudai2:simple-audio-card,cpu {
                   	                sound-dai = <&sai3>;
                            };
                    simple-audio-card,codec {
                               	sound-dai = <&codec>;
    				clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
                            };
              };
    /*
    	sound-wm8960 {
    		compatible = "fsl,imx-audio-wm8960";
    		model = "wm8960-audio";
    		audio-cpu = <&sai3>;
    		audio-codec = <&codec>;
    		audio-asrc = <&easrc>;
    		hp-det-gpio = <&gpio4 28 0>;
    		audio-routing =
    			"Headphone Jack", "HP_L",
    			"Headphone Jack", "HP_R",
    			"Ext Spk", "SPK_LP",
    			"Ext Spk", "SPK_LN",
    			"Ext Spk", "SPK_RP",
    			"Ext Spk", "SPK_RN",
    			"LINPUT1", "Mic Jack",
    			"LINPUT3", "Mic Jack",
    			"Mic Jack", "MICB";
    	};
    
    	sound-micfil {
    		compatible = "fsl,imx-audio-card";
    		model = "micfil-audio";
    		pri-dai-link {
    			link-name = "micfil hifi";
    			format = "i2s";
    			cpu {
    				sound-dai = <&micfil>;
    			};
    		};
    	};
    
    	sound-xcvr {
    		compatible = "fsl,imx-audio-card";
    		model = "imx-audio-xcvr";
    		pri-dai-link {
    			link-name = "XCVR PCM";
    			cpu {
    				sound-dai = <&xcvr>;
    			};
    		};
    	};
    */
    	lvds_backlight: lvds_backlight {
    		compatible = "pwm-backlight";
    		pwms = <&pwm2 0 100000 0>;
    		status = "okay";
    
    		brightness-levels = < 0  1  2  3  4  5  6  7  8  9
    				     10 11 12 13 14 15 16 17 18 19
    				     20 21 22 23 24 25 26 27 28 29
    				     30 31 32 33 34 35 36 37 38 39
    				     40 41 42 43 44 45 46 47 48 49
    				     50 51 52 53 54 55 56 57 58 59
    				     60 61 62 63 64 65 66 67 68 69
    				     70 71 72 73 74 75 76 77 78 79
    				     80 81 82 83 84 85 86 87 88 89
    				     90 91 92 93 94 95 96 97 98 99
    				    100>;
    		default-brightness-level = <80>;
    	};
    
    	cbtl04gp {
    		compatible = "nxp,cbtl04gp";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_typec_mux>;
    		switch-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
    		orientation-switch;
    
    		port {
    			usb3_data_ss: endpoint {
    				remote-endpoint = <&typec_con_ss>;
    			};
    		};
    	};
    };
    
    &flexspi {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_flexspi0>;
    	status = "okay";
    
    	flash0: mt25qu256aba@0 {
    		reg = <0>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    		compatible = "jedec,spi-nor";
    		spi-max-frequency = <80000000>;
    		spi-tx-bus-width = <1>;
    		spi-rx-bus-width = <4>;
    	};
    };
    
    &A53_0 {
    	cpu-supply = <&buck2>;
    };
    
    &A53_1 {
    	cpu-supply = <&buck2>;
    };
    
    &A53_2 {
    	cpu-supply = <&buck2>;
    };
    
    &A53_3 {
    	cpu-supply = <&buck2>;
    };
    
    &dsp {
    	status = "okay";
    };
    
    &pwm1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_pwm1>;
    	status = "okay";
    };
    
    &pwm2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_pwm2>;
    	status = "okay";
    };
    
    &pwm4 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_pwm4>;
    	status = "okay";
    };
    
    &aud2htx {
    	status = "okay";
    };
    
    &ecspi2 {
    	#address-cells = <1>;
    	#size-cells = <0>;
    	fsl,spi-num-chipselects = <1>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
    	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
    	status = "okay";
    
    	spidev1: spi@0 {
    		reg = <0>;
    		compatible = "rohm,dh2228fv";
    		spi-max-frequency = <500000>;
    	};
    };
    
    &eqos {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_eqos>;
    	phy-mode = "rgmii-id";
    	phy-handle = <&ethphy0>;
    	snps,force_thresh_dma_mode;
    	snps,mtl-tx-config = <&mtl_tx_setup>;
    	snps,mtl-rx-config = <&mtl_rx_setup>;
    	status = "okay";
    
    	mdio {
    		compatible = "snps,dwmac-mdio";
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		ethphy0: ethernet-phy@1 {
    			compatible = "ethernet-phy-ieee802.3-c22";
    			reg = <1>;
    			eee-broken-1000t;
    			reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
    			reset-assert-us = <10000>;
    			reset-deassert-us = <80000>;
    			realtek,clkout-disable;
    		};
    	};
    
    	mtl_tx_setup: tx-queues-config {
    		snps,tx-queues-to-use = <5>;
    		snps,tx-sched-sp;
    
    		queue0 {
    			snps,dcb-algorithm;
    			snps,priority = <0x1>;
    		};
    
    		queue1 {
    			snps,dcb-algorithm;
    			snps,priority = <0x2>;
    		};
    
    		queue2 {
    			snps,dcb-algorithm;
    			snps,priority = <0x4>;
    		};
    
    		queue3 {
    			snps,dcb-algorithm;
    			snps,priority = <0x8>;
    		};
    
    		queue4 {
    			snps,dcb-algorithm;
    			snps,priority = <0xf0>;
    		};
    	};
    
    	mtl_rx_setup: rx-queues-config {
    		snps,rx-queues-to-use = <5>;
    		snps,rx-sched-sp;
    
    		queue0 {
    			snps,dcb-algorithm;
    			snps,priority = <0x1>;
    			snps,map-to-dma-channel = <0>;
    		};
    
    		queue1 {
    			snps,dcb-algorithm;
    			snps,priority = <0x2>;
    			snps,map-to-dma-channel = <1>;
    		};
    
    		queue2 {
    			snps,dcb-algorithm;
    			snps,priority = <0x4>;
    			snps,map-to-dma-channel = <2>;
    		};
    
    		queue3 {
    			snps,dcb-algorithm;
    			snps,priority = <0x8>;
    			snps,map-to-dma-channel = <3>;
    		};
    
    		queue4 {
    			snps,dcb-algorithm;
    			snps,priority = <0xf0>;
    			snps,map-to-dma-channel = <4>;
    		};
    	};
    };
    
    &fec {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_fec>;
    	phy-mode = "rgmii-id";
    	phy-handle = <&ethphy1>;
    	fsl,magic-packet;
    	status = "okay";
    
    	mdio {
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		ethphy1: ethernet-phy@1 {
    			compatible = "ethernet-phy-ieee802.3-c22";
    			reg = <1>;
    			eee-broken-1000t;
    			reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
    			reset-assert-us = <10000>;
    			reset-deassert-us = <80000>;
    			realtek,aldps-enable;
    			realtek,clkout-disable;
    		};
    	};
    };
    
    &flexcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_flexcan1>;
    	xceiver-supply = <&reg_can1_stby>;
    	status = "okay";
    };
    
    &flexcan2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_flexcan2>;
    	xceiver-supply = <&reg_can2_stby>;
    	pinctrl-assert-gpios = <&pca6416 3 GPIO_ACTIVE_HIGH>;
    	status = "disabled";/* can2 pin conflict with pdm */
    };
    
    &i2c1 {
    	clock-frequency = <400000>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_i2c1>;
    	status = "okay";
    
    	pmic@25 {
    		compatible = "nxp,pca9450c";
    		reg = <0x25>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_pmic>;
    		interrupt-parent = <&gpio1>;
    		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
    
    		regulators {
    			buck1: BUCK1 {
    				regulator-name = "BUCK1";
    				regulator-min-microvolt = <600000>;
    				regulator-max-microvolt = <2187500>;
    				regulator-boot-on;
    				regulator-always-on;
    				regulator-ramp-delay = <3125>;
    			};
    
    			buck2: BUCK2 {
    				regulator-name = "BUCK2";
    				regulator-min-microvolt = <600000>;
    				regulator-max-microvolt = <2187500>;
    				regulator-boot-on;
    				regulator-always-on;
    				regulator-ramp-delay = <3125>;
    				nxp,dvs-run-voltage = <950000>;
    				nxp,dvs-standby-voltage = <850000>;
    			};
    
    			buck4: BUCK4{
    				regulator-name = "BUCK4";
    				regulator-min-microvolt = <600000>;
    				regulator-max-microvolt = <3400000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			buck5: BUCK5{
    				regulator-name = "BUCK5";
    				regulator-min-microvolt = <600000>;
    				regulator-max-microvolt = <3400000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			buck6: BUCK6 {
    				regulator-name = "BUCK6";
    				regulator-min-microvolt = <600000>;
    				regulator-max-microvolt = <3400000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			ldo1: LDO1 {
    				regulator-name = "LDO1";
    				regulator-min-microvolt = <1600000>;
    				regulator-max-microvolt = <3300000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			ldo2: LDO2 {
    				regulator-name = "LDO2";
    				regulator-min-microvolt = <800000>;
    				regulator-max-microvolt = <1150000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			ldo3: LDO3 {
    				regulator-name = "LDO3";
    				regulator-min-microvolt = <800000>;
    				regulator-max-microvolt = <3300000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			ldo4: LDO4 {
    				regulator-name = "LDO4";
    				regulator-min-microvolt = <800000>;
    				regulator-max-microvolt = <3300000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    
    			ldo5: LDO5 {
    				regulator-name = "LDO5";
    				regulator-min-microvolt = <1800000>;
    				regulator-max-microvolt = <3300000>;
    				regulator-boot-on;
    				regulator-always-on;
    			};
    		};
    	};
    };
    
    &i2c2 {
    	clock-frequency = <100000>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_i2c2>;
    	status = "okay";
    
    	adv_bridge: adv7535@3d {
    		compatible = "adi,adv7535";
    		reg = <0x3d>;
    		adi,addr-cec = <0x3b>;
    		adi,dsi-lanes = <4>;
    		status = "okay";
    
    		port {
    			adv7535_from_dsim: endpoint {
    				remote-endpoint = <&dsim_to_adv7535>;
    			};
    		};
    	};
    
    	lvds_bridge: lvds-to-hdmi-bridge@4c {
    		compatible = "ite,it6263";
    		reg = <0x4c>;
    		reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
    
    		port {
    			it6263_in: endpoint {
    				remote-endpoint = <&lvds_out>;
    			};
    		};
    	};
    
    	ov5640_0: ov5640_mipi@3c {
    		compatible = "ovti,ov5640";
    		reg = <0x3c>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
    		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
    		clock-names = "xclk";
    		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
    		assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
    		assigned-clock-rates = <24000000>;
    		csi_id = <0>;
    		powerdown-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
    		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
    		mclk = <24000000>;
    		mclk_source = <0>;
    		mipi_csi;
    		status = "okay";
    
    		port {
    			ov5640_mipi_0_ep: endpoint {
    				remote-endpoint = <&mipi_csi0_ep>;
    				data-lanes = <1 2>;
    				clock-lanes = <0>;
    			};
    		};
    	};
    
    	ptn5110: tcpc@50 {
    		compatible = "nxp,ptn5110";
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_typec>;
    		reg = <0x50>;
    		interrupt-parent = <&gpio4>;
    		interrupts = <19 8>;
    
    		port {
    			typec_dr_sw: endpoint {
    				remote-endpoint = <&usb3_drd_sw>;
    			};
    		};
    
    		usb_con: connector {
    			compatible = "usb-c-connector";
    			label = "USB-C";
    			power-role = "dual";
    			data-role = "dual";
    			try-power-role = "sink";
    			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
    			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
    				     PDO_VAR(5000, 20000, 3000)>;
    			op-sink-microwatt = <15000000>;
    			self-powered;
    
    			ports {
    				#address-cells = <1>;
    				#size-cells = <0>;
    
    				port@1 {
    					reg = <1>;
    					typec_con_ss: endpoint {
    						remote-endpoint = <&usb3_data_ss>;
    					};
    				};
    			};
    		};
    	};
    };
    
    &i2c3 {
    	clock-frequency = <400000>;
    	pinctrl-names = "default", "gpio";
    	pinctrl-0 = <&pinctrl_i2c3>;
    	status = "okay";
    
      	  codec: codec@18 {
    		#sound-dai-cells=<0>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_tlv320>;
    	        compatible = "ti,tlv320aic3x";
                    reg = <0x18>;
    		reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
    		IOVDD-supply = <&buck5>;
    		DVDD-supply = <&buck5>;
    		AVDD-supply = <&buck4>;
    		DRVDD-supply = <&buck4>;
    	};
    
    	pca6416: gpio@20 {
    		compatible = "ti,tca6416";
    		reg = <0x20>;
    		gpio-controller;
    		#gpio-cells = <2>;
    		interrupt-controller;
    		#interrupt-cells = <2>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_pca6416_int>;
    		interrupt-parent = <&gpio1>;
    		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
    		gpio-line-names = "EXT_PWREN1",
    			"EXT_PWREN2",
    			"CAN1/I2C5_SEL",
    			"PDM/CAN2_SEL",
    			"FAN_EN",
    			"PWR_MEAS_IO1",
    			"PWR_MEAS_IO2",
    			"EXP_P0_7",
    			"EXP_P1_0",
    			"EXP_P1_1",
    			"EXP_P1_2",
    			"EXP_P1_3",
    			"EXP_P1_4",
    			"EXP_P1_5",
    			"EXP_P1_6",
    			"EXP_P1_7";
    	};
    /*
    	codec: wm8960@1a {
    		compatible = "wlf,wm8960";
    		reg = <0x1a>;
    		clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>;
    		clock-names = "mclk";
    		wlf,shared-lrclk;
    		wlf,hp-cfg = <3 2 3>;
    		wlf,gpio-cfg = <1 3>;
    		SPKVDD1-supply = <&reg_audio_pwr>;
    	};
    */
    	ov5640_1: ov5640_mipi@3c {
    		compatible = "ovti,ov5640";
    		reg = <0x3c>;
    		pinctrl-names = "default";
    		pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
    		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
    		clock-names = "xclk";
    		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
    		assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
    		assigned-clock-rates = <24000000>;
    		csi_id = <0>;
    		powerdown-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
    		reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
    		mclk = <24000000>;
    		mclk_source = <0>;
    		mipi_csi;
    		status = "disabled";
    
    		port {
    			ov5640_mipi_1_ep: endpoint {
    				remote-endpoint = <&mipi_csi1_ep>;
    				data-lanes = <1 2>;
    				clock-lanes = <0>;
    			};
    		};
    	};
    };
    
    /* I2C on expansion connector J22. */
    &i2c5 {
    	clock-frequency = <100000>; /* Lower clock speed for external bus. */
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_i2c5>;
    	status = "disabled"; /* can1 pins conflict with i2c5 */
    
    	/* GPIO 2 of PCA6416 is used to switch between CAN1 and I2C5 functions:
    	 *     LOW:  CAN1 (default, pull-down)
    	 *     HIGH: I2C5
    	 * You need to set it to high to enable I2C5 (for example, add gpio-hog
    	 * in pca6416 node).
    	 */
    };
    
    &irqsteer_hdmi {
    	status = "okay";
    };
    
    &hdmi_blk_ctrl {
    	status = "okay";
    };
    
    &hdmi_pavi {
    	status = "okay";
    };
    
    &hdmi {
    	status = "okay";
    };
    
    &hdmiphy {
    	status = "okay";
    };
    
    &lcdif1 {
    	status = "okay";
    };
    
    &lcdif2 {
    	status = "okay";
    };
    
    &lcdif3 {
    	status = "okay";
    
    	thres-low  = <1 2>;             /* (FIFO * 1 / 2) */
    	thres-high = <3 4>;             /* (FIFO * 3 / 4) */
    };
    
    &ldb {
    	status = "okay";
    
    	lvds-channel@0 {
    		status = "okay";
    
    		port@1 {
    			reg = <1>;
    
    			lvds_out: endpoint {
    				remote-endpoint = <&it6263_in>;
    			};
    		};
    	};
    };
    
    &ldb_phy {
    	status = "okay";
    };
    
    &mipi_dsi {
    	status = "okay";
    
    	port@1 {
    		dsim_to_adv7535: endpoint {
    			remote-endpoint = <&adv7535_from_dsim>;
    			attach-bridge;
    		};
    	};
    };
    
    &pcie_phy {
    	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
    	clocks = <&pcie0_refclk>;
    	clock-names = "ref";
    	status = "okay";
    };
    
    &pcie {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_pcie0>;
    	reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
    	clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
    		 <&clk IMX8MP_CLK_PCIE_ROOT>,
    		 <&clk IMX8MP_CLK_HSIO_AXI>;
    	clock-names = "pcie", "pcie_aux", "pcie_bus";
    	assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
    	assigned-clock-rates = <10000000>;
    	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
    	vpcie-supply = <&reg_pcie0>;
    	status = "okay";
    
    	wifi_wake_host {
    		compatible = "nxp,wifi-wake-host";
    		interrupt-parent = <&gpio5>;
    		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
    		interrupt-names = "host-wake";
    	};
    };
    
    &pcie_ep{
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_pcie0>;
    	clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
    		 <&clk IMX8MP_CLK_PCIE_ROOT>,
    		 <&clk IMX8MP_CLK_HSIO_AXI>;
    	clock-names = "pcie", "pcie_aux", "pcie_bus";
    	assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
    			  <&clk IMX8MP_CLK_PCIE_AUX>;
    	assigned-clock-rates = <500000000>, <10000000>;
    	assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>,
    				 <&clk IMX8MP_SYS_PLL2_50M>;
    	status = "disabled";
    };
    
    &sai2 {
    	#sound-dai-cells = <0>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_sai2>;
    	assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
    	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
    	assigned-clock-rates = <12288000>;
    	fsl,sai-mclk-direction-output;
    	status = "okay";
    };
    
    &snvs_pwrkey {
    	status = "okay";
    };
    
    &easrc {
    	fsl,asrc-rate  = <48000>;
    	status = "okay";
    };
    
    &micfil {
    	#sound-dai-cells = <0>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_pdm>;
    	assigned-clocks = <&clk IMX8MP_CLK_PDM>;
    	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
    	assigned-clock-rates = <196608000>;
    	status = "okay";
    };
    
    &sai3 {
    	#sound-dai-cells = <0>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_sai3>;
    	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
    	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
    	assigned-clock-rates = <12288000>;
    	clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>,
    		 <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
    		 <&clk IMX8MP_CLK_DUMMY>, <&clk IMX8MP_AUDIO_PLL1_OUT>, <&clk IMX8MP_AUDIO_PLL2_OUT>;
    	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
    	fsl,sai-synchronous-rx;
    	status = "okay";
    };
    
    &xcvr {
    	#sound-dai-cells = <0>;
    	status = "okay";
    };
    
    &sdma2 {
    	status = "okay";
    };
    
    &uart1 { /* BT */
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_uart1>;
    	assigned-clocks = <&clk IMX8MP_CLK_UART1>;
    	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
    	fsl,uart-has-rtscts;
    	status = "okay";
    
    	bluetooth {
    		compatible = "nxp,88w8997-bt";
    	};
    };
    
    &uart2 {
    	/* console */
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_uart2>;
    	status = "okay";
    };
    
    &usb3_phy0 {
    	fsl,phy-tx-vref-tune = <0xe>;
    	fsl,phy-tx-preemp-amp-tune = <3>;
    	fsl,phy-tx-vboost-level = <5>;
    	fsl,phy-comp-dis-tune = <7>;
    	fsl,pcs-tx-deemph-3p5db = <0x21>;
    	fsl,phy-pcs-tx-swing-full = <0x7f>;
    	status = "okay";
    };
    
    &usb3_0 {
    	status = "okay";
    };
    
    &usb_dwc3_0 {
    	dr_mode = "otg";
    	hnp-disable;
    	srp-disable;
    	adp-disable;
    	usb-role-switch;
    	role-switch-default-mode = "none";
    	snps,dis-u1-entry-quirk;
    	snps,dis-u2-entry-quirk;
    	status = "okay";
    
    	port {
    		usb3_drd_sw: endpoint {
    			remote-endpoint = <&typec_dr_sw>;
    		};
    	};
    };
    
    &usb3_phy1 {
    	fsl,phy-tx-preemp-amp-tune = <3>;
    	fsl,phy-tx-vref-tune = <0xb>;
    	status = "okay";
    };
    
    &usb3_1 {
    	status = "okay";
    };
    
    &usb_dwc3_1 {
    	vbus-supply = <&reg_usb_vbus>;
    	dr_mode = "host";
    	status = "okay";
    };
    
    &uart3 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_uart3>;
    	assigned-clocks = <&clk IMX8MP_CLK_UART3>;
    	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
    	fsl,uart-has-rtscts;
    	status = "okay";
    };
    
    &usdhc2 {
    	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
    	assigned-clock-rates = <400000000>;
    	pinctrl-names = "default", "state_100mhz", "state_200mhz";
    	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
    	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
    	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
    	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
    	vmmc-supply = <&reg_usdhc2_vmmc>;
    	bus-width = <4>;
    	status = "okay";
    };
    
    &usdhc3 {
    	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
    	assigned-clock-rates = <400000000>;
    	pinctrl-names = "default", "state_100mhz", "state_200mhz";
    	pinctrl-0 = <&pinctrl_usdhc3>;
    	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
    	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
    	bus-width = <8>;
    	non-removable;
    	status = "okay";
    };
    
    &wdog1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_wdog>;
    	fsl,ext-reset-output;
    	status = "okay";
    };
    
    &iomuxc {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_hog>;
    
    	pinctrl_hog: hoggrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x400001c2
    			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x400001c2
    			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x40000010
    			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x40000010
    			/*
    			 * M.2 pin20 & pin21 need to be set to 11 for 88W9098 to select the
    			 * default Reference Clock Frequency
    			 */
    			MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09		0x1c4
    		>;
    	};
    
    	pinctrl_pwm1: pwm1grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT	0x116
    		>;
    	};
    
    	pinctrl_pwm2: pwm2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT	0x116
    		>;
    	};
    
    	pinctrl_pwm4: pwm4grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT	0x116
    		>;
    	};
    
    	pinctrl_ecspi2: ecspi2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK		0x82
    			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI		0x82
    			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO		0x82
    		>;
    	};
    
    	pinctrl_ecspi2_cs: ecspi2cs {
    		fsl,pins = <
    			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13		0x40000
    		>;
    	};
    
    	pinctrl_eqos: eqosgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC				0x2
    			MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO				0x2
    			MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0			0x90
    			MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1			0x90
    			MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2			0x90
    			MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3			0x90
    			MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x90
    			MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL			0x90
    			MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0			0x16
    			MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1			0x16
    			MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2			0x16
    			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3			0x16
    			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL			0x16
    			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x16
    			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22				0x10
    		>;
    	};
    
    	pinctrl_fec: fecgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC		0x2
    			MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO		0x2
    			MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0		0x90
    			MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1		0x90
    			MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2		0x90
    			MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3		0x90
    			MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC		0x90
    			MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL	0x90
    			MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0		0x16
    			MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1		0x16
    			MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2		0x16
    			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x16
    			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x16
    			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x16
    			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x10
    		>;
    	};
    
    	pinctrl_flexcan1: flexcan1grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX          0x154
    			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX          0x154
    		>;
    	};
    
    	pinctrl_flexcan2: flexcan2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX         0x154
    			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX         0x154
    		>;
    	};
    
    	pinctrl_flexcan1_reg: flexcan1reggrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05  0x154   /* CAN1_STBY */
    		>;
    	};
    
    	pinctrl_flexcan2_reg: flexcan2reggrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27      0x154   /* CAN2_STBY */
    		>;
    	};
    
    	pinctrl_flexspi0: flexspi0grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK           0x1c2
    			MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B        0x82
    			MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00      0x82
    			MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01      0x82
    			MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02      0x82
    			MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03      0x82
    		>;
    	};
    
    	pinctrl_gpio_led: gpioledgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16	0x140
    		>;
    	};
    
    	pinctrl_i2c1: i2c1grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL		0x400001c2
    			MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA		0x400001c2
    		>;
    	};
    
    	pinctrl_i2c2: i2c2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL		0x400001c2
    			MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA		0x400001c2
    		>;
    	};
    
    	pinctrl_i2c3: i2c3grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL		0x400001c2
    			MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA		0x400001c2
    		>;
    	};
    
    	pinctrl_i2c5: i2c5grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA         0x400001c2
    			MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL         0x400001c2
    		>;
    	};
    
    	pinctrl_mipi_dsi_en: mipi_dsi_en {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08	0x16
    		>;
    	};
    
    	pinctrl_pcie0: pcie0grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B	0x60 /* open drain, pull up */
    			MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07	0x40
    			MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21	0x1c4
    		>;
    	};
    
    	pinctrl_pcie0_reg: pcie0reggrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06	0x40
    		>;
    	};
    
    	pinctrl_pmic: pmicgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03	0x000001c0
    		>;
    	};
    
    	pinctrl_pca6416_int: pca6416_int_grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x146 /* Input pull-up. */
    		>;
    	};
    
    	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
    		>;
    	};
    
    	pinctrl_pdm: pdmgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK		0xd6
    			MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00	0xd6
    			MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_PDM_BIT_STREAM01	0xd6
    			MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_PDM_BIT_STREAM02	0xd6
    			MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_PDM_BIT_STREAM03	0xd6
    		>;
    	};
    
    	pinctrl_sai2: sai2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK	0xd6
    			MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC	0xd6
    			MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00	0xd6
    			MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00	0xd6
    		>;
    	};
            
    	pinctrl_tlv320: tlv320grp { 
                    fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 	0x00
                    >; 
            }; 
    
    	pinctrl_sai3: sai3grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0xd6
    			MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0xd6
    			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00	0xd6
    			MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00	0xd6
    			MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK	0xd6
    			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28		0xd6
    			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29		0xd6
    		>;
    	};
    
    	pinctrl_i2c2_synaptics_dsx_io: synaptics_dsx_iogrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09		0x16
    		>;
    	};
    
    	pinctrl_uart1: uart1grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
    			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140
    			MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS	0x140
    			MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS	0x140
    		>;
    	};
    
    	pinctrl_typec: typec1grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x1c4
    		>;
    	};
    
    	pinctrl_typec_mux: typec1muxgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20	0x16
    		>;
    	};
    
    	pinctrl_uart2: uart2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x140
    			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x140
    		>;
    	};
    
    	pinctrl_usb1_vbus: usb1grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14		0x10
    		>;
    	};
    
    	pinctrl_uart3: uart3grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX		0x140
    			MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX		0x140
    			MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS		0x140
    			MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS		0x140
    		>;
    	};
    
    	pinctrl_usdhc2: usdhc2grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190
    			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0
    			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0
    			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0
    			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0
    			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0
    			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc0
    		>;
    	};
    
    	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194
    			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4
    			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4
    			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4
    			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4
    			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4
    			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
    		>;
    	};
    
    	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196
    			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6
    			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6
    			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6
    			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6
    			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6
    			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
    		>;
    	};
    
    	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4
    		>;
    	};
    
    	pinctrl_usdhc3: usdhc3grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x190
    			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d0
    			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d0
    			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d0
    			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d0
    			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d0
    			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d0
    			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d0
    			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d0
    			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d0
    			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x190
    		>;
    	};
    
    	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x194
    			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d4
    			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d4
    			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d4
    			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d4
    			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d4
    			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d4
    			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d4
    			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d4
    			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d4
    			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x194
    		>;
    	};
    
    	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK	0x196
    			MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD	0x1d6
    			MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0	0x1d6
    			MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1	0x1d6
    			MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2	0x1d6
    			MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3	0x1d6
    			MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4	0x1d6
    			MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5	0x1d6
    			MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6	0x1d6
    			MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7	0x1d6
    			MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE	0x196
    		>;
    	};
    
    	pinctrl_wdog: wdoggrp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x166
    		>;
    	};
    
    	pinctrl_csi0_pwn: csi0_pwn_grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11	0x10
    		>;
    	};
    
    	pinctrl_csi0_rst: csi0_rst_grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x10
    		>;
    	};
    
    	pinctrl_csi_mclk: csi_mclk_grp {
    		fsl,pins = <
    			MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2	0x50
    		>;
    	};
    };
    
    &vpu_g1 {
    	status = "okay";
    };
    
    &vpu_g2 {
    	status = "okay";
    };
    
    &vpu_vc8000e {
    	status = "okay";
    };
    
    &vpu_v4l2 {
    	status = "okay";
    };
    
    &gpu_3d {
    	status = "okay";
    };
    
    &gpu_2d {
    	status = "okay";
    };
    
    &ml_vipsi {
    	status = "okay";
    };
    
    &mix_gpu_ml {
    	status = "okay";
    };
    
    &mipi_csi_0 {
    	#address-cells = <1>;
    	#size-cells = <0>;
    	status = "okay";
    
    	port@0 {
    		reg = <0>;
    		mipi_csi0_ep: endpoint {
    			remote-endpoint = <&ov5640_mipi_0_ep>;
    			data-lanes = <2>;
    			csis-hs-settle = <13>;
    			csis-clk-settle = <2>;
    			csis-wclk;
    		};
    	};
    };
    
    &mipi_csi_1 {
    	#address-cells = <1>;
    	#size-cells = <0>;
    	status = "disabled";
    
    	port@1 {
    		reg = <1>;
    		mipi_csi1_ep: endpoint {
    			remote-endpoint = <&ov5640_mipi_1_ep>;
    			data-lanes = <2>;
    			csis-hs-settle = <13>;
    			csis-clk-settle = <2>;
    			csis-wclk;
    		};
    	};
    };
    
    &cameradev {
    	status = "okay";
    };
    
    &isi_0 {
    	status = "okay";
    
    	cap_device {
    		status = "okay";
    	};
    
    	m2m_device {
    		status = "okay";
    	};
    };
    
    &isi_1 {
    	status = "disabled";
    
    	cap_device {
    		status = "okay";
    	};
    };


    请告诉我们所需的必要更改  

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    关于平台 clk 设置,请咨询平台供应商。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

     BCLK 频率 和  Wclk 频率都不是稳定的、这是一个大问题。

    请上传波形。

     https://git.ti.com/cgit/lpaa-android-drivers/tasdevice-linux-driver/plain/doc/Guideline%20for%20TASDEVICE%20driver%20on%20Linux.pdf 第25页提供 了波形示例。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    root@imx8mp-LPDDR4-evk:~# cd /proc/asound
    root@imx8mp-LPDDR4-EVK:/proc/asound ls
    audiohdmi btscoaudio card0 Card1 Card2卡设备 PCM soundtlv320aic3计时器版本
    root@imx8mp-LPDDR4-EVK:/proc/asound cat PCM
    00-00:30c20000.SAI-bt-SCO-PCM-WB-20000:30cWB.SAI-bt-PCM-WB-0:30cWB.SAI-bt-SCO-PCM-WB bt-SCO-WB-20000:Playback 1: Capture 1
    01-00: 30c30000.SAI-tlv320aic3x-hifi tlv320aic3x-hifi-0 : 30c30000.SAI-tlv320aic3x-hifi tlv320aic3x-hif-0 :播放1 :捕捉1
    02-00:一. MX HDMI I2S-hif-0:i. MX HDMI I2S-HIFI-0:播放1
    root@imx8mp-LPDDR4-EVK:/proc/asound cat card
    Card0/Card1/ Card2/卡
    root@imx8mp-LPDDR4-EVK:/proc/asound cat card
    0 [btscoaudio ]: simple-card - bt-sco-audio
    BT-SCO 音频
    1 [soundtlv320aic3]:simple-card - sound-tlv320aic310x
    sound-tlv320aic310x
    2 [audiohdmi ]: audio-hdmi - audio-hdmi
    音频- HDMI
    root@imx8mp-LPDDR4-evk:/proc/asound CD
    root@imx8mp-LPDDR4-evk:~# cd /sys/bus/i2c/devices
    0-0025/1-003c/1-003d/1-004C/1-0050/2-0018/ 2-0020/ i2c-0/i2c-1/i2c-2/ i2c-6/
    root@imx8mp-LPDDR4-evk:~# cd /sys/bus/i2c/devices/2-00
    2-0018/ 2-0020/
    root@imx8mp-LPDDR4-EVK:~#

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    ...

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    嗨、大家好。

    由于公司的政策、我无法访问该链接。 您会友好吗、上传波形。 谢谢。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    上载了一个图标。 请上传图片 Insert -> Image/Video/file。 谢谢。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    抱歉、我无法附加图像您能否共享您的邮件 ID 以便我可以在其中附加。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    我已经给你发了邮件。