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[参考译文] TLV320DAC3100EVM-U:tlv320aic31xx-codec 1-0018:aic31xx_setup_PLL:采样率(48000)和格式不受支持!

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Other Parts Discussed in Thread: TLV320DAC3100EVM-U
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/audio-group/audio/f/audio-forum/1420187/tlv320dac3100evm-u-tlv320aic31xx-codec-1-0018-aic31xx_setup_pll-sample-rate-48000-and-format-not-supported

器件型号:TLV320DAC3100EVM-U

工具与软件:

我正在 尝试使用 IMX93QS93 Linux 板测试 TLV320DAC3100EVM-U 套件。 您可以在这里看到、我能够检测到它:  

root@qs93-5210:~# aplay -l
**** List of PLAYBACK Hardware Devices ****
card 0: tlv320aic31xxco [tlv320aic31xx-codec], device 0: 443b0000.sai-tlv320dac31xx-hifi tlv320dac31xx-hifi-0 [443b0000.sai-tlv320dac31xx-hifi tlv320dac31xx-hifi-0]
  Subdevices: 1/1
  Subdevice #0: subdevice #0


和、  
 
root@qs93-5210:~# aplay -L
null
    Discard all samples (playback) or generate zero samples (capture)
sysdefault:CARD=tlv320aic31xxco
    tlv320aic31xx-codec, 443b0000.sai-tlv320dac31xx-hifi tlv320dac31xx-hifi-0
    Default Audio Device

-但当我试图玩正弦波,我得到了以下错误:  

root@qs93-5210:~# speaker-test -D plughw:0,0 -c 2 -r 48000 -F S16_LE -t sine -f 500

speaker-test 1.2.8

Playback device is plughw:0,0
Stream parameters are 48000[  247.600154] tlv320aic31xx-codec 1-0018: aic31xx_setup_pll: Sample rate (48000) and format not supported
Hz, S16_LE, 2 ch[  247.610738] tlv320aic31xx-codec 1-0018: ASoC: error at snd_soc_dai_hw_params on tlv320dac31xx-hifi: -22
annels
Sine wave[  247.621511]  443b0000.sai-tlv320dac31xx-hifi: ASoC: error at __soc_pcm_hw_params on 443b0000.sai-tlv320dac31xx-hifi: -22
 rate is 500.0000Hz
Rate set to 48000Hz (requested 48000Hz)
Buffer size range from 32 to 131072
Period size range from 16 to 8184
Using max buffer size 131072
Periods = 4
Unable to set hw params for playback: Invalid argument
Setting of hwparams failed: Invalid argument


-我也看到过以下相关的内核消息:
alsa-lib /usr/src/debug/alsa-lib/1.2.8-r0/src/ucm/main.c:1541:(snd_use_case_mgr_open) error: failed to import hw:0 use case configuration -2
No state is present for card tlv320aic31xxco
alsa-lib /usr/src/debug/alsa-lib/1.2.8-r0/src/ucm/main.c:1541:(snd_use_case_mgr_open) error: failed to import hw:0 use case configuration -2
Found hardware: "simple-card" "" "" "" ""
Hardware is initialized using a generic method


-这里是我的设备树:  
audio_clk: audio-clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <12288000>;
	};
	
	codec_audio: sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "tlv320aic31xx-codec";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&codec_dai>;
		simple-audio-card,frame-master = <&codec_dai>;
		simple-audio-card,widgets =
    		"Microphone", "Mic Jack",
			"Line", "Line In",
			"Line", "Line Out",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker Out";
		simple-audio-card,routing =
    		"Line In", "AIN1",      // Line input route
   			"Line Out", "HPL",      // Line out to left headphone
    		"Line Out", "HPR",      // Line out to right headphone
    		"Headphone Jack", "HPL",
    		"Headphone Jack", "HPR";
		status = "okay";
		cpu_dai: simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};
		codec_dai: simple-audio-card,codec {
			sound-dai = <&audio_codec>;
			clocks = <&audio_clk>;
		};
	};
};

&sai1 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	status = "okay";
	assigned-clocks = <&clk IMX93_CLK_SAI1>;
	assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
	assigned-clock-rates = <12288000>; 
	clocks = <&clk IMX93_CLK_SAI1_IPG>, 
	<&clk IMX93_CLK_AUDIO_PLL>,
	<&clk IMX93_CLK_DUMMY>, <&clk IMX93_CLK_DUMMY>, 
	<&clk IMX93_CLK_AUDIO_PLL>;
	clock-names = "bus", "mclk1", "mclk2", "mclk3", "pll";
};

&lpi2c2 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c2>;
	status = "okay";

	// Add TLV320AIC3100 audio codec node
	audio_codec: codec@18 {
		compatible = "ti,tlv320dac3100";
		pinctrl-names = "default";
		reg = <0x18>;
		#sound-dai-cells = <0>;
		reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>;
		HPVDD-supply = <&reg_vdd_3v3>; 
		AVDD-supply = <&reg_vdd_3v3>;
		DVDD-supply = <&reg_vref_1v8>;
		IOVDD-supply = <&reg_vdd_3v3>;
		SPRVDD-supply = <&reg_vdd_3v3>;
		SPLVDD-supply = <&reg_vdd_3v3>;
		status = "okay";
	};
};

我在努力工作、有人能帮我解决这个问题吗?  

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Ahmed:

    我们的专家今天来度假。 他们明天会跟你跟进。

    感谢您的耐心等待、
    Jeff McPherson

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    尊敬的 Jeff:  

    感谢您让我知道。  

    Ahmed

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Ahmed:

    好的。 他们可能需要半天左右的时间来审查您的问题、因为问题在假期出现、但他们会很快与您联系。

    再次感谢、
    Jeff McPherson

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    最新动态:

    我按如下所示修改了器件树:  

    reg_audio_pwr_5v: regulator-audio-pwr_5v {
    		compatible = "regulator-fixed";
    		regulator-name = "audio-pwr_5v";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		enable-active-high;
    		regulator-always-on;
    	};
    
    	reg_audio_pwr_3v3: regulator-audio-pwr_3v3 {
    		compatible = "regulator-fixed";
    		regulator-name = "audio-pwr_3v3";
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		enable-active-high;
    		regulator-always-on;
    	};
    
    	reg_audio_pwr_1v8: regulator-audio-pwr_1v8 {
    		compatible = "regulator-fixed";
    		regulator-name = "audio-pwr_1v8";
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    		enable-active-high;
    		regulator-always-on;
    	};
    
    	audio_clk: audio-clk {
    		compatible = "fixed-clock";
    		#clock-cells = <0>;
    		clock-frequency = <12288000>;
    	};
    	
    	codec_audio: sound {
    		compatible = "simple-audio-card";
    		simple-audio-card,name = "tlv320dac3100-codec";
    		simple-audio-card,format = "i2s";
    		simple-audio-card,bitclock-master = <&cpu_dai>;
    		simple-audio-card,frame-master = <&cpu_dai>;
    		simple-audio-card,widgets =
        		"Microphone", "Mic Jack",
    			"Line", "Line In",
    			"Line", "Line Out",
    			"Headphone", "Headphone Jack",
    			"Speaker", "Speaker Out";
    		simple-audio-card,routing =
    			"Mic Jack", "MICBIAS",
        		"Line In", "AIN1",      // Line input route
       			"Line Out", "HPL",      // Line out to left headphone
        		"Line Out", "HPR",      // Line out to right headphone
    			"Headphone Jack", "HPL",
        		"Headphone Jack", "HPR";
    		status = "okay";
    		cpu_dai: simple-audio-card,cpu {
    			sound-dai = <&sai1>;
    		};
    		codec_dai: simple-audio-card,codec {
    			sound-dai = <&audio_codec>;
    			clocks = <&audio_clk>;
    		};
    	};
    
    &sai1 {
    	#sound-dai-cells = <0>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_sai1>;
    	assigned-clocks = <&clk IMX93_CLK_SAI1>;
    	assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>;
    	assigned-clock-rates = <12288000>;
    	fsl,sai-mclk-direction-output;
    	status = "okay";	
    };
    
    &lpi2c2 {
    	clock-frequency = <400000>;
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_lpi2c2>;
    	scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    	sda-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    	status = "okay";
    
    	// Add TLV320AIC3100 audio codec node
    	audio_codec: codec@18 {
    		compatible = "ti,tlv320dac3100";
    		pinctrl-names = "default";
    		reg = <0x18>;
    		#sound-dai-cells = <0>;
    		ai31xx-micbias-vg = <MICBIAS_2_5V>;
    		reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>;
    		HPVDD-supply = <&reg_audio_pwr_3v3>;
    		AVDD-supply = <&reg_audio_pwr_3v3>;
    		DVDD-supply = <&reg_audio_pwr_1v8>;
    		IOVDD-supply = <&reg_audio_pwr_3v3>;
    		SPRVDD-supply = <&reg_audio_pwr_3v3>;
    		SPLVDD-supply = <&reg_audio_pwr_3v3>;
    		SPKVDD-supply = <&reg_audio_pwr_5v>;
    	};
    };	


    我可以针对测试扬声器 更高的采样率(441000Hz、480000Hz)。
    root@qs93-5210:~# speaker-test -D plughw:0,0 -r 441000 -F S16_LE -t sine -f 500 -c 2
    
    speaker-test 1.2.8
    
    Playback device is plughw:0,0
    Stream parameters are 441000Hz, S16_LE, 2 channels
    Sine wave rate is 500.0000Hz
    Rate set to 441000Hz (requested 441000Hz)
    Buffer size range from 73 to 301056
    Period size range from 36 to 18798
    Using max buffer size 301056
    Periods = 4
    was set period_size = 9408
    was set buffer_size = 301056
     0 - Front Left
     1 - Front Right
    ...


    但仍然无法正常工作 48kHz 采样率 .  
    root@qs93-5210:~# speaker-test -D plughw:0,0 -r 48000 -F S16_LE -t sine -f 500 -c 2
    
    speaker-test 1.2.8
    
    Playback device is plughw:[   77.992689] tlv320aic31xx-codec 1-0018: aic31xx_setup_pll: Sample rate (48000) and format not supported
    0,0
    Stream param[   78.003218] tlv320aic31xx-codec 1-0018: ASoC: error at snd_soc_dai_hw_params on tlv320dac31xx-hifi: -22
    eters are 48000Hz[   78.014054]  443b0000.sai-tlv320dac31xx-hifi: ASoC: error at __soc_pcm_hw_params on 443b0000.sai-tlv320dac31xx-hifi: -22
    , S16_LE, 2 channels
    Sine wave rate is 500.0000Hz
    Rate set to 48000Hz (requested 48000Hz)
    Buffer size range from 32 to 131072
    Period size range from 16 to 8184
    Using max buffer size 131072
    Periods = 4
    Unable to set hw params for playback: Invalid argument
    Setting of hwparams failed: Invalid argument
    


    有什么关于这个问题的原因的想法吗?

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Ahmed:

    我们能否获得以下信息:

    1) 1)在功能情况下和器件不工作的情况下器件配置寄存器的 I2C 转储?

    2) 2)我们可以在示波器上监控480kHz 和48kHz 记录命令的 I2S 信号(BCLK、WCLK)吗?

    谢谢。此致、

    Lakshmi Narasimhan

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    编解码器正在工作、我将时钟频率更改为12000000、而不是 12288000

    audio_clk: audio-clk {
    		compatible = "fixed-clock";
    		#clock-cells = <0>;
    		clock-frequency = <12000000>;
    	};

    TLV320AIC31XX.c Linux 驱动程序源代码似乎不支持48kHz 的 MCLK (12288000)。  
    如您所见:  

    	/* mclk/p    rate  pll: r  j     d     dosr ndac mdac  aors nadc madc */
    	/* 8k rate */
    	{  512000,   8000,	4, 48,   0,	128,  48,  2,   128,  48,  2},
    	{12000000,   8000,	1, 8, 1920,	128,  48,  2,	128,  48,  2},
    	{12000000,   8000,	1, 8, 1920,	128,  32,  3,	128,  32,  3},
    	{12500000,   8000,	1, 7, 8643,	128,  48,  2,	128,  48,  2},
    	/* 11.025k rate */
    	{  705600,  11025,	3, 48,   0,	128,  24,  3,	128,  24,  3},
    	{12000000,  11025,	1, 7, 5264,	128,  32,  2,	128,  32,  2},
    	{12000000,  11025,	1, 8, 4672,	128,  24,  3,	128,  24,  3},
    	{12500000,  11025,	1, 7, 2253,	128,  32,  2,	128,  32,  2},
    	/* 16k rate */
    	{  512000,  16000,	4, 48,   0,	128,  16,  3,	128,  16,  3},
    	{ 1024000,  16000,	2, 48,   0,	128,  16,  3,	128,  16,  3},
    	{12000000,  16000,	1, 8, 1920,	128,  24,  2,	128,  24,  2},
    	{12000000,  16000,	1, 8, 1920,	128,  16,  3,	128,  16,  3},
    	{12500000,  16000,	1, 7, 8643,	128,  24,  2,	128,  24,  2},
    	/* 22.05k rate */
    	{  705600,  22050,	4, 36,   0,	128,  12,  3,	128,  12,  3},
    	{ 1411200,  22050,	2, 36,   0,	128,  12,  3,	128,  12,  3},
    	{12000000,  22050,	1, 7, 5264,	128,  16,  2,	128,  16,  2},
    	{12000000,  22050,	1, 8, 4672,	128,  12,  3,	128,  12,  3},
    	{12500000,  22050,	1, 7, 2253,	128,  16,  2,	128,  16,  2},
    	/* 32k rate */
    	{ 1024000,  32000,      2, 48,   0,	128,  12,  2,	128,  12,  2},
    	{ 2048000,  32000,      1, 48,   0,	128,  12,  2,	128,  12,  2},
    	{12000000,  32000,	1, 8, 1920,	128,  12,  2,	128,  12,  2},
    	{12000000,  32000,	1, 8, 1920,	128,   8,  3,	128,   8,  3},
    	{12500000,  32000,	1, 7, 8643,	128,  12,  2,	128,  12,  2},
    	/* 44.1k rate */
    	{ 1411200,  44100,	2, 32,   0,	128,   8,  2,	128,   8,  2},
    	{ 2822400,  44100,	1, 32,   0,	128,   8,  2,	128,   8,  2},
    	{12000000,  44100,	1, 7, 5264,	128,   8,  2,	128,   8,  2},
    	{12000000,  44100,	1, 8, 4672,	128,   6,  3,	128,   6,  3},
    	{12500000,  44100,	1, 7, 2253,	128,   8,  2,	128,   8,  2},
    	/* 48k rate */
    	{ 1536000,  48000,	2, 32,   0,	128,   8,  2,	128,   8,  2},
    	{ 3072000,  48000,	1, 32,   0,	128,   8,  2,	128,   8,  2},
    	{12000000,  48000,	1, 8, 1920,	128,   8,  2,	128,   8,  2},
    	{12000000,  48000,	1, 7, 6800,	 96,   5,  4,	 96,   5,  4},
    	{12500000,  48000,	1, 7, 8643,	128,   8,  2,	128,   8,  2},
    	/* 88.2k rate */
    	{ 2822400,  88200,	2, 16,   0,	 64,   8,  2,	 64,   8,  2},
    	{ 5644800,  88200,	1, 16,   0,	 64,   8,  2,	 64,   8,  2},
    	{12000000,  88200,	1, 7, 5264,	 64,   8,  2,	 64,   8,  2},
    	{12000000,  88200,	1, 8, 4672,	 64,   6,  3,	 64,   6,  3},
    	{12500000,  88200,	1, 7, 2253,	 64,   8,  2,	 64,   8,  2},
    	/* 96k rate */
    	{ 3072000,  96000,	2, 16,   0,	 64,   8,  2,	 64,   8,  2},
    	{ 6144000,  96000,	1, 16,   0,	 64,   8,  2,	 64,   8,  2},
    	{12000000,  96000,	1, 8, 1920,	 64,   8,  2,	 64,   8,  2},
    	{12000000,  96000,	1, 7, 6800,	 48,   5,  4,	 48,   5,  4},
    	{12500000,  96000,	1, 7, 8643,	 64,   8,  2,	 64,   8,  2},
    	/* 176.4k rate */
    	{ 5644800, 176400,	2, 8,    0,	 32,   8,  2,	 32,   8,  2},
    	{11289600, 176400,	1, 8,    0,	 32,   8,  2,	 32,   8,  2},
    	{12000000, 176400,	1, 7, 5264,	 32,   8,  2,	 32,   8,  2},
    	{12000000, 176400,	1, 8, 4672,	 32,   6,  3,	 32,   6,  3},
    	{12500000, 176400,	1, 7, 2253,	 32,   8,  2,	 32,   8,  2},
    	/* 192k rate */
    	{ 6144000, 192000,	2, 8,	 0,	 32,   8,  2,	 32,   8,  2},
    	{12288000, 192000,	1, 8,	 0,	 32,   8,  2,	 32,   8,  2},
    	{12000000, 192000,	1, 8, 1920,	 32,   8,  2,	 32,   8,  2},
    	{12000000, 192000,	1, 7, 6800,	 24,   5,  4,	 24,   5,  4},
    	{12500000, 192000,	1, 7, 8643,	 32,   8,  2,	 32,   8,  2},
    };


    仍然不确定我的方法是否正确、但它是有效的!  

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Ahmed:

    很高兴知道它 现在正在工作。

    上面的代码根据 MCLK 频率和采样率列出了器件的内部时钟配置。 由于对于48kHz 采样率、这里列出了12MHz 而不是12.288MHz 的时钟配置、因此12.288MHz 设置存在问题。

    谢谢。此致、

    Lakshmi Narasimhan