[参考译文] TMS320F280023：是否可以检查十六进制文件中由链接器生成的 CRC 值？

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Other Parts Discussed in Thread: TMS320F280025, C2000WARE, TMS320F280023

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1117849/tms320f280023-is-it-possible-to-check-the-crc-value-generated-by-the-linker-in-the-hex-file

器件型号：TMS320F280023
主题中讨论的其他器件：TMS320F280025、 C2000WARE、

您好、支持团队、

我使用了链接器的 CRC 功能、以便在编译时为闪存区域计算 CRC 值。
然后、我使用 CCS C2000十六进制实用程序生成了一个十六进制文件、并尝试检查十六进制文件是否包含 CRC 值、但无法检查。

映射文件的内容(仅摘录 CRC 部分)

ccs_flash_checksum @ 00087fc4 records: 9, size/record: 6, table size: 60, algorithm=CRC32_PRIME(ID=0), CRC: b2d69b45

hex 文件的内容(仅摘录地址00087fc4周围的区域)

%4E6BA800087FC40609000045D600000008020000000208FE00000000080000000000000008000000000000
%46680800087FE4000800000000000000080000000000000008000000000008000000000008C400

是否可以在十六进制文件中看到 CRC：b2d69b45？

提前感谢您。

Hayao

3 年多前

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好、Hayao、

该 CRC 段是否分配给任何存储器区域？

此致、

Veena

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好、Veena、

是的、TI.memcrc 被分配到闪存区域的末尾。
我在您的论坛页面"TMS320F280025：硬件 CRC 编程或代码"中提到了 LED_ex1_blinky.c。

提前感谢您。

Hayao

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您能否共享链接器 cmd 文件和.map 文件？

此致、

Veena

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好、Veena、

很抱歉、由于保密原因、我无法向您提供文件。
相反、我已经修改了 C2000Ware 示例软件"2838x_vcrc_crc_32"作为在闪存区域执行 CRC 操作的基础、我可以为您提供该文件。
(我看到、即使使用该软件、也无法在十六进制文件上确认 CRC 值)。

2838x_RAM_lnk_CPU1_CRC32.cmd

MEMORY
{
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN            : origin = 0x000000, length = 0x000002
   BOOT_RSVD        : origin = 0x000002, length = 0x0001AE     /* Part of M0, BOOT rom will use this for stack */
   RAMM0            : origin = 0x0001B0, length = 0x000250
   RAMM1            : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
// RAMM1_RSVD       : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD0            : origin = 0x00C000, length = 0x000800
   RAMD1            : origin = 0x00C800, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS67          : origin = 0x00B000, length = 0x001000
// RAMLS7           : origin = 0x00B800, length = 0x000800
   RAMGS0           : origin = 0x00D000, length = 0x001000
   RAMGS1           : origin = 0x00E000, length = 0x001000
   RAMGS2           : origin = 0x00F000, length = 0x001000
   RAMGS3           : origin = 0x010000, length = 0x001000
   RAMGS4           : origin = 0x011000, length = 0x001000
   RAMGS5           : origin = 0x012000, length = 0x001000
   RAMGS6           : origin = 0x013000, length = 0x001000
   RAMGS7           : origin = 0x014000, length = 0x001000
   RAMGS8           : origin = 0x015000, length = 0x001000
   RAMGS9           : origin = 0x016000, length = 0x001000
   RAMGS10          : origin = 0x017000, length = 0x001000
   RAMGS11          : origin = 0x018000, length = 0x001000
   RAMGS12          : origin = 0x019000, length = 0x001000
   RAMGS13          : origin = 0x01A000, length = 0x001000
   RAMGS14          : origin = 0x01B000, length = 0x001000
   RAMGS15          : origin = 0x01C000, length = 0x000FF8
//   RAMGS15_RSVD     : origin = 0x01CFF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   /* Flash sectors */
GROUP {      /* GROUP memory ranges for crc/checksum of entire flash */
   FLASH0           : origin = 0x080000, length = 0x002000  /* on-chip Flash */
   FLASH1           : origin = 0x082000, length = 0x002000  /* on-chip Flash */
   FLASH2           : origin = 0x084000, length = 0x002000  /* on-chip Flash */
   FLASH3           : origin = 0x086000, length = 0x002000  /* on-chip Flash */
   FLASH4           : origin = 0x088000, length = 0x008000  /* on-chip Flash */
   FLASH5           : origin = 0x090000, length = 0x008000  /* on-chip Flash */
   FLASH6           : origin = 0x098000, length = 0x008000  /* on-chip Flash */
   FLASH7           : origin = 0x0A0000, length = 0x008000  /* on-chip Flash */
   FLASH8           : origin = 0x0A8000, length = 0x008000  /* on-chip Flash */
   FLASH9           : origin = 0x0B0000, length = 0x008000  /* on-chip Flash */
   FLASH10          : origin = 0x0B8000, length = 0x002000  /* on-chip Flash */
   FLASH11          : origin = 0x0BA000, length = 0x002000  /* on-chip Flash */
   FLASH12          : origin = 0x0BC000, length = 0x002000  /* on-chip Flash */
   FLASH13          : origin = 0x0BE000, length = 0x001000  /* on-chip Flash */
//   FLASH13          : origin = 0x0BE000, length = 0x002000  /* on-chip Flash */
}  crc(ccs_flash_checksum, algorithm=CRC32_PRIME)

   FLASH_SECCRC	    : origin = 0x0BF000, length = 0x001000

   CPU1TOCPU2RAM    : origin = 0x03A000, length = 0x000800
   CPU2TOCPU1RAM    : origin = 0x03B000, length = 0x000800

   CPUTOCMRAM       : origin = 0x039000, length = 0x000800
   CMTOCPURAM       : origin = 0x038000, length = 0x000800

   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002
}


SECTIONS
{
   codestart        : > BEGIN
   .text            : >> RAMD0 | RAMD1 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4
   .cinit           : > RAMM0
   .switch          : > RAMM0
   .reset           : > RESET, TYPE = DSECT /* not used, */

   .stack           : > RAMM1
#if defined(__TI_EABI__)
   .bss             : > RAMLS5
   .bss:output      : > RAMLS3
   .init_array      : > RAMM0
   .const           : > RAMLS67
   .data            : > RAMLS5
   .sysmem          : > RAMLS4
   .TI.crctab	    : > RAMGS0
	/* Test specific sections */
   UNION (TEST_INPUT_CRC) : RUN = RAMGS0, RUN_START(testInputRunStart){
      testInput     :{} LOAD = RAMGS0,
                        LOAD_START(testInputLoadStart),
                        LOAD_SIZE(testInputLoadSize),
                        crc_table(linkerCrcTable, algorithm = CRC32_PRIME)
         }crc_table(linkerCrcTable, algorithm = CRC32_C)
#else
   .pinit           : > RAMM0
   .ebss            : >> RAMLS5 | RAMLS6
   .econst          : > RAMLS5
   .esysmem         : > RAMLS5
#endif

   ramgs0 : > RAMGS0, type=NOINIT
   ramgs1 : > RAMGS1, type=NOINIT

   MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
   MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
   MSGRAM_CPU_TO_CM   > CPUTOCMRAM, type=NOINIT
   MSGRAM_CM_TO_CPU   > CMTOCPURAM, type=NOINIT

   /* The following section definition are for SDFM examples */
   Filter_RegsFile  : > RAMGS0
   Filter1_RegsFile : > RAMGS1, fill=0x1111
   Filter2_RegsFile : > RAMGS2, fill=0x2222
   Filter3_RegsFile : > RAMGS3, fill=0x3333
   Filter4_RegsFile : > RAMGS4, fill=0x4444
   Difference_RegsFile : >RAMGS5, fill=0x3333

    .TI.ramfunc : {} > RAMM0

   .TI.memcrc          : > FLASH_SECCRC
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

2838x_vcrc_crc_32.map

******************************************************************************
             TMS320C2000 Linker PC v21.6.0                     
******************************************************************************
>> Linked Tue Jul 19 09:17:34 2022

OUTPUT FILE NAME:   <2838x_vcrc_crc_32.out>
ENTRY POINT SYMBOL: "_c_int00"  address: 0000c2bb


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
  BEGIN                 00000000   00000002  00000000  00000002  RWIX
  BOOT_RSVD             00000002   000001ae  00000000  000001ae  RWIX
  RAMM0                 000001b0   00000250  0000001c  00000234  RWIX
  RAMM1                 00000400   000003f8  00000200  000001f8  RWIX
  RAMLS0                00008000   00000800  00000000  00000800  RWIX
  RAMLS1                00008800   00000800  00000000  00000800  RWIX
  RAMLS2                00009000   00000800  00000000  00000800  RWIX
  RAMLS3                00009800   00000800  00000000  00000800  RWIX
  RAMLS4                0000a000   00000800  00000000  00000800  RWIX
  RAMLS5                0000a800   00000800  0000002e  000007d2  RWIX
  RAMLS67               0000b000   00001000  00000800  00000800  RWIX
  RAMD0                 0000c000   00000800  00000301  000004ff  RWIX
  RAMD1                 0000c800   00000800  00000000  00000800  RWIX
  RAMGS0                0000d000   00001000  00000092  00000f6e  RWIX
  RAMGS1                0000e000   00001000  00000000  00001000  RWIX
  RAMGS2                0000f000   00001000  00000000  00001000  RWIX
  RAMGS3                00010000   00001000  00000000  00001000  RWIX
  RAMGS4                00011000   00001000  00000000  00001000  RWIX
  RAMGS5                00012000   00001000  00000000  00001000  RWIX
  RAMGS6                00013000   00001000  00000000  00001000  RWIX
  RAMGS7                00014000   00001000  00000000  00001000  RWIX
  RAMGS8                00015000   00001000  00000000  00001000  RWIX
  RAMGS9                00016000   00001000  00000000  00001000  RWIX
  RAMGS10               00017000   00001000  00000000  00001000  RWIX
  RAMGS11               00018000   00001000  00000000  00001000  RWIX
  RAMGS12               00019000   00001000  00000000  00001000  RWIX
  RAMGS13               0001a000   00001000  00000000  00001000  RWIX
  RAMGS14               0001b000   00001000  00000000  00001000  RWIX
  RAMGS15               0001c000   00000ff8  00000000  00000ff8  RWIX
  CMTOCPURAM            00038000   00000800  00000000  00000800  RWIX
  CPUTOCMRAM            00039000   00000800  00000000  00000800  RWIX
  CPU1TOCPU2RAM         0003a000   00000800  00000000  00000800  RWIX
  CPU2TOCPU1RAM         0003b000   00000800  00000000  00000800  RWIX
  CANA_MSG_RAM          00049000   00000800  00000000  00000800  RWIX
  CANB_MSG_RAM          0004b000   00000800  00000000  00000800  RWIX
  FLASH0                00080000   00002000  00000000  00002000  RWIX
  FLASH1                00082000   00002000  00000000  00002000  RWIX
  FLASH2                00084000   00002000  00000000  00002000  RWIX
  FLASH3                00086000   00002000  00000000  00002000  RWIX
  FLASH4                00088000   00008000  00000000  00008000  RWIX
  FLASH5                00090000   00008000  00000000  00008000  RWIX
  FLASH6                00098000   00008000  00000000  00008000  RWIX
  FLASH7                000a0000   00008000  00000000  00008000  RWIX
  FLASH8                000a8000   00008000  00000000  00008000  RWIX
  FLASH9                000b0000   00008000  00000000  00008000  RWIX
  FLASH10               000b8000   00002000  00000000  00002000  RWIX
  FLASH11               000ba000   00002000  00000000  00002000  RWIX
  FLASH12               000bc000   00002000  00000000  00002000  RWIX
  FLASH13               000be000   00001000  00000000  00001000  RWIX
  FLASH_SECCRC          000bf000   00001000  0000005a  00000fa6  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.cinit     0    000001b0    0000001c     
                  000001b0    00000009     (.cinit..data.load) [load image, compression = lzss]
                  000001b9    00000001     --HOLE-- [fill = 0]
                  000001ba    00000006     (__TI_handler_table)
                  000001c0    00000004     (.cinit..bss.load) [load image, compression = zero_init]
                  000001c4    00000008     (__TI_cinit_table)

.reset     0    003fffc0    00000000     DSECT

.stack     0    00000400    00000200     UNINITIALIZED
                  00000400    00000200     --HOLE--

.bss       0    0000a800    00000022     UNINITIALIZED
                  0000a800    00000022     main.obj (.bss)

.init_array 
*          0    000001b0    00000000     UNINITIALIZED

.data      0    0000a822    0000000c     UNINITIALIZED
                  0000a822    00000006     rts2800_fpu64_eabi.lib : exit.c.obj (.data)
                  0000a828    00000002                            : _lock.c.obj (.data:_lock)
                  0000a82a    00000002                            : _lock.c.obj (.data:_unlock)
                  0000a82c    00000002     main.obj (.data)

.const     0    0000b000    00000800     
                  0000b000    00000200     main.obj (.const:crc32P1Table)
                  0000b200    00000200     main.obj (.const:crc32P1TableReflected)
                  0000b400    00000200     main.obj (.const:crc32P2Table)
                  0000b600    00000200     main.obj (.const:crc32P2TableReflected)

testInput 
*          0    0000d040    00000040     RUN ADDR = 0000d000
                  0000d040    00000040     main.obj (testInput)

.TI.crctab 
*          0    0000d080    00000012     
                  0000d080    00000012     (.TI.crctab:linkerCrcTable)

.TI.memcrc 
*          0    000bf000    0000005a     
                  000bf000    0000005a     (.TI.memcrc:ccs_flash_checksum)

.text      0    0000c000    00000301     
                  0000c000    000000e6     main.obj (.text)
                  0000c0e6    00000084     c28x_vcrc_library_fpu64.lib : vcu2_crc_32.obj (.text)
                  0000c16a    0000005e                                 : crc_32.obj (.text)
                  0000c1c8    00000051                                 : crc_util.obj (.text)
                  0000c219    00000031     rts2800_fpu64_eabi.lib : copy_decompress_lzss.c.obj (.text:decompress:lzss)
                  0000c24a    0000002b                            : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)
                  0000c275    00000029                            : exit.c.obj (.text)
                  0000c29e    0000001d                            : memcpy.c.obj (.text)
                  0000c2bb    00000019                            : boot28.asm.obj (.text)
                  0000c2d4    0000000d                            : copy_zero_init.c.obj (.text:decompress:ZI:__TI_zero_init_nomemset)
                  0000c2e1    0000000c                            : args_main.c.obj (.text)
                  0000c2ed    00000009                            : _lock.c.obj (.text)
                  0000c2f6    00000008                            : copy_decompress_none.c.obj (.text:decompress:none)
                  0000c2fe    00000002                            : pre_init.c.obj (.text)
                  0000c300    00000001                            : startup.c.obj (.text)

MODULE SUMMARY

       Module                       code   ro data   rw data
       ------                       ----   -------   -------
    .\
       main.obj                     230    2176      36     
    +--+----------------------------+------+---------+---------+
       Total:                       230    2176      36     
                                                            
    C:/ti/C2000Ware_4_01_00_00/libraries/dsp/VCU/c28/lib/c28x_vcrc_library_fpu64.lib
       vcu2_crc_32.obj              132    0         0      
       crc_32.obj                   94     0         0      
       crc_util.obj                 81     0         0      
    +--+----------------------------+------+---------+---------+
       Total:                       307    0         0      
                                                            
    C:\ti\ccs1100\ccs\tools\compiler\ti-cgt-c2000_21.6.0.LTS\lib\rts2800_fpu64_eabi.lib
       copy_decompress_lzss.c.obj   49     0         0      
       exit.c.obj                   41     0         6      
       autoinit.c.obj               43     0         0      
       memcpy.c.obj                 29     0         0      
       boot28.asm.obj               25     0         0      
       _lock.c.obj                  9      0         4      
       copy_zero_init.c.obj         13     0         0      
       args_main.c.obj              12     0         0      
       copy_decompress_none.c.obj   8      0         0      
       pre_init.c.obj               2      0         0      
       startup.c.obj                1      0         0      
    +--+----------------------------+------+---------+---------+
       Total:                       232    0         10     
                                                            
       Stack:                       0      0         512    
       Linker Generated:            0      135       0      
    +--+----------------------------+------+---------+---------+
       Grand Total:                 769    2311      558    


LINKER GENERATED COPY TABLES

__TI_cinit_table @ 000001c4 records: 2, size/record: 4, table size: 8
	.data: load addr=000001b0, load size=00000009 bytes, run addr=0000a822, run size=0000000c bytes, compression=lzss
	.bss: load addr=000001c0, load size=00000004 bytes, run addr=0000a800, run size=00000022 bytes, compression=zero_init


LINKER GENERATED HANDLER TABLE

__TI_handler_table @ 000001ba records: 3, size/record: 2, table size: 6
	index: 0, handler: __TI_zero_init
	index: 1, handler: __TI_decompress_lzss
	index: 2, handler: __TI_decompress_none


LINKER GENERATED CRC TABLES

linkerCrcTable @ 0000d080 records: 2, size/record: 8, table size: 18
	testInput: algorithm=CRC32_C(ID=11), page=0, load addr=0000d040, size=00000040, CRC=a598634e
	testInput: algorithm=CRC32_PRIME(ID=0), page=0, load addr=0000d040, size=00000040, CRC=aec1e77d


LINKER GENERATED MEMRANGE CRC TABLES

ccs_flash_checksum @ 000bf000 records: 14, size/record: 6, table size: 90, algorithm=CRC32_PRIME(ID=0), CRC: 9f045f78
	FLASH0: page=0, load addr=00080000, size=00002000
	FLASH1: page=0, load addr=00082000, size=00002000
	FLASH2: page=0, load addr=00084000, size=00002000
	FLASH3: page=0, load addr=00086000, size=00002000
	FLASH4: page=0, load addr=00088000, size=00008000
	FLASH5: page=0, load addr=00090000, size=00008000
	FLASH6: page=0, load addr=00098000, size=00008000
	FLASH7: page=0, load addr=000a0000, size=00008000
	FLASH8: page=0, load addr=000a8000, size=00008000
	FLASH9: page=0, load addr=000b0000, size=00008000
	FLASH10: page=0, load addr=000b8000, size=00002000
	FLASH11: page=0, load addr=000ba000, size=00002000
	FLASH12: page=0, load addr=000bc000, size=00002000
	FLASH13: page=0, load addr=000be000, size=00001000


GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE

address     data page           name
--------    ----------------    ----
00000400      10 (00000400)     __stack

0000a800     2a0 (0000a800)     handleCRC
0000a802     2a0 (0000a800)     pLinkerCrcTable
0000a804     2a0 (0000a800)     linkerCrcRecord
0000a80c     2a0 (0000a800)     CRC
0000a822     2a0 (0000a800)     __TI_enable_exit_profile_output
0000a824     2a0 (0000a800)     __TI_cleanup_ptr
0000a826     2a0 (0000a800)     __TI_dtors_ptr
0000a828     2a0 (0000a800)     _lock
0000a82a     2a0 (0000a800)     _unlock
0000a82c     2a0 (0000a800)     pass
0000a82d     2a0 (0000a800)     fail

0000b000     2c0 (0000b000)     crc32P1Table

0000b200     2c8 (0000b200)     crc32P1TableReflected

0000b400     2d0 (0000b400)     crc32P2Table

0000b600     2d8 (0000b600)     crc32P2TableReflected


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

page  address   name                                
----  -------   ----                                
0     0000c275  C$$EXIT                             
0     0000a80c  CRC                                 
0     0000c1c8  CRC_bitReflect                      
0     0000c168  CRC_init32Bit                       
0     0000c20b  CRC_pow2                            
0     0000c0e6  CRC_run32BitPoly1                   
0     0000c15e  CRC_run32BitPoly1Reflected          
0     0000c122  CRC_run32BitPoly2                   
0     0000c163  CRC_run32BitPoly2Reflected          
0     0000c199  CRC_run32BitReflectedTableLookupC   
0     0000c16a  CRC_run32BitTableLookupC            
0     000001c4  __TI_CINIT_Base                     
0     000001cc  __TI_CINIT_Limit                    
0     000001cc  __TI_CINIT_Warm                     
0     0000d080  __TI_CRC_linkerCrcTable             
0     000001ba  __TI_Handler_Table_Base             
0     000001c0  __TI_Handler_Table_Limit            
0     000bf000  __TI_MEMRANGE_CRC_ccs_flash_checksum
0     00000600  __TI_STACK_END                      
abs   00000200  __TI_STACK_SIZE                     
0     0000c24a  __TI_auto_init_nobinit_nopinit      
0     0000a824  __TI_cleanup_ptr                    
0     0000c219  __TI_decompress_lzss                
0     0000c2f6  __TI_decompress_none                
0     0000a826  __TI_dtors_ptr                      
0     0000a822  __TI_enable_exit_profile_output     
abs   ffffffff  __TI_pprof_out_hndl                 
abs   ffffffff  __TI_prof_data_size                 
abs   ffffffff  __TI_prof_data_start                
0     0000c2d4  __TI_zero_init_nomemset             
n/a   UNDEFED   __c_args__                          
0     00000400  __stack                             
0     0000c2e1  _args_main                          
0     0000c2bb  _c_int00                            
0     0000a828  _lock                               
0     0000c2f5  _nop                                
0     0000c2f1  _register_lock                      
0     0000c2ed  _register_unlock                    
0     0000c300  _system_post_cinit                  
0     0000c2fe  _system_pre_init                    
0     0000a82a  _unlock                             
0     0000c275  abort                               
0     000bf000  ccs_flash_checksum                  
0     0000b000  crc32P1Table                        
0     0000b200  crc32P1TableReflected               
0     0000b400  crc32P2Table                        
0     0000b600  crc32P2TableReflected               
0     0000c0e4  error                               
0     0000c277  exit                                
0     0000a82d  fail                                
0     0000a800  handleCRC                           
0     0000a804  linkerCrcRecord                     
0     0000d080  linkerCrcTable                      
0     0000c000  main                                
0     0000c29e  memcpy                              
0     0000a802  pLinkerCrcTable                     
0     0000a82c  pass                                
abs   00000040  testInputLoadSize                   
0     0000d040  testInputLoadStart                  
abs   0000d000  testInputRunStart                   


GLOBAL SYMBOLS: SORTED BY Symbol Address 

page  address   name                                
----  -------   ----                                
0     000001ba  __TI_Handler_Table_Base             
0     000001c0  __TI_Handler_Table_Limit            
0     000001c4  __TI_CINIT_Base                     
0     000001cc  __TI_CINIT_Limit                    
0     000001cc  __TI_CINIT_Warm                     
0     00000400  __stack                             
0     00000600  __TI_STACK_END                      
0     0000a800  handleCRC                           
0     0000a802  pLinkerCrcTable                     
0     0000a804  linkerCrcRecord                     
0     0000a80c  CRC                                 
0     0000a822  __TI_enable_exit_profile_output     
0     0000a824  __TI_cleanup_ptr                    
0     0000a826  __TI_dtors_ptr                      
0     0000a828  _lock                               
0     0000a82a  _unlock                             
0     0000a82c  pass                                
0     0000a82d  fail                                
0     0000b000  crc32P1Table                        
0     0000b200  crc32P1TableReflected               
0     0000b400  crc32P2Table                        
0     0000b600  crc32P2TableReflected               
0     0000c000  main                                
0     0000c0e4  error                               
0     0000c0e6  CRC_run32BitPoly1                   
0     0000c122  CRC_run32BitPoly2                   
0     0000c15e  CRC_run32BitPoly1Reflected          
0     0000c163  CRC_run32BitPoly2Reflected          
0     0000c168  CRC_init32Bit                       
0     0000c16a  CRC_run32BitTableLookupC            
0     0000c199  CRC_run32BitReflectedTableLookupC   
0     0000c1c8  CRC_bitReflect                      
0     0000c20b  CRC_pow2                            
0     0000c219  __TI_decompress_lzss                
0     0000c24a  __TI_auto_init_nobinit_nopinit      
0     0000c275  C$$EXIT                             
0     0000c275  abort                               
0     0000c277  exit                                
0     0000c29e  memcpy                              
0     0000c2bb  _c_int00                            
0     0000c2d4  __TI_zero_init_nomemset             
0     0000c2e1  _args_main                          
0     0000c2ed  _register_unlock                    
0     0000c2f1  _register_lock                      
0     0000c2f5  _nop                                
0     0000c2f6  __TI_decompress_none                
0     0000c2fe  _system_pre_init                    
0     0000c300  _system_post_cinit                  
0     0000d040  testInputLoadStart                  
0     0000d080  __TI_CRC_linkerCrcTable             
0     0000d080  linkerCrcTable                      
0     000bf000  __TI_MEMRANGE_CRC_ccs_flash_checksum
0     000bf000  ccs_flash_checksum                  
abs   00000040  testInputLoadSize                   
abs   00000200  __TI_STACK_SIZE                     
abs   0000d000  testInputRunStart                   
abs   ffffffff  __TI_pprof_out_hndl                 
abs   ffffffff  __TI_prof_data_size                 
abs   ffffffff  __TI_prof_data_start                
n/a   UNDEFED   __c_args__                          

[60 symbols]

2838x_vcrc_crc_32.hex

%466AF8000001B0010B010002F51180F000D4001900F60000002200B0002200C0000000
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%4E63880000B3A0D4D342D4F8DD6EDACDBE5BB9E1B077B7E608700FCA065C01FF656962D36B456C
%4E63A80000B3C0780AEE0D5404C2036167F7604D69DB6E4AD1DCD666DFF0D853BCC5BB7FB2E9B5
%4E6FC80000B3E01CBD8ABA30B3A6B405D093D729DEBFD92E66B8610268946F370BA10C1B058D02
%4E6F780000B400000041DC82B8C364047145AD86C9C71508E3493F8A5BCB870C924D4E8E2ACFF6
%4E60980000B420511A10C6D3A2927E556B14B7D7D3960F59F91825DB419A9D5D881C54DF309EEC
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%4E62D80000B460B2F3F32F304B7197B682F75E343A75E6BA10FBCC38A87974BE61FFBD3CD97D05
%4E6FF80000B480870EC6D205B6446A837FC2A301C7401B8FEDCE310D554C898B9CCA40092448F8
%4E61180000B4A0D61497C854AC1570D26593B950DD1101DEF79F2B5C4F1D93DA869B5A583E19E2
%4E62380000B4C064E7253BE65FA7836096214AE22EA3F26C042DD8EEBCAF60687529A9EACDAB11
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%4E6F880000B5004FC10E1DCD798CA54BB00A6CC90888D4472206FEC59A84464353028FC1EB8037
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%4E61C80000B540AC28EDF42E906F4CA859E9852AE16B3DA4CBE517267367AFA0BAE166220263DE
%4E62E80000B560FD32BCEE7F8A3E56F943B89F7BFB3A27F5D1B40D776936B5F1A0B07C731832C4
%4E60080000B580C8CF89134A770BABCCBE8D624E060FDAC02C81F042940348C45D858146E50739
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%4E63680000B5E07A3C3BE0F884B9587E4D3F91FCF5BD2972DF3303F067B1BB76AE3772F416B5CA
%4E6F180000B6000000036BF73BF4501F9A1CF1E8A1EBCACFD9CCB238E23B89D043D32827782413
%4E63380000B6206F5E6C3598659B0E70C473AF87FF8494A087A3EC57BC54D7BF1DBC7648264B4D
%4E63580000B640DEBDDDD629862AEDC127C24C361C35771164120FE65FE5340EFE0D95F9C5FAAE
%4E6F780000B660B1E3B28846D845B3AE79AD1259425A297E3A7D5189018A6A61A062CB969B95F0
%4E6F980000B680BC7BBF104B40482BA3E1A08A54DA57B173A270C9849987F26C386F539B039868
%4E63B80000B6A0D325D04E241E2775CCBFCFD43B8438EF1CFC1F97EBC7E8AC0366000DF45DF736
%4E63D80000B6C062C661AD95FD96967D5C7E378A67890CAD1FAE745A24594FB285B1EE45BE46D5
%4E6FF80000B6E00D980EF3FAA3F9C812021169E539E652C241C12A357A3611DDDBDEB02AE0298B
%4E63280000B70078F67B9D8FCD8CA6676C64079057933CB72FB4444014437FA8B5ABDE5F8E5CE5
%4E6F480000B72017A814C3E093E3F808320B59FF09FC62D871DB1A2F4A2C21C7EBC48030D033BB
%4E6F680000B740A64BA5205170521BB9D1BABA4EEA4D8169926AF99EA99DC27608756381338258
%4E63880000B760C915CA7E3E2E3D45D68FD5E421B422DF06CC05A7F1F7F29C19561A3DEE6DED06
%4E63A80000B780C48DC7E633B630DDDB17D87C2C2C2F470B54083FFC6FFF0414CE17A5E3F5E09E
%4E6FC80000B7A0ABD3A8B85CE85F83B449B72243724019640A67619331905A7B9078FB8CAB8FC0
%4E6FE80000B7C01A30195BED0BEE6005AA06C1F291F1FAD5E9D68222D221B9CA73C9183D483E23
%4E64080000B7E0756E76058255813E6AF4699F9DCF9EA4BAB7B9DC4D8C4EE7A52DA6465216517D
%4E61980000C0000CA9404040A8000000409E1FA0000CBF0E0F1000001200001400681E006A2000
%4E6F180000C0200C001E671FA02000671FA0104200001400102000671FA01044001000E6202000
%4E60080000C040671FA0104600100022202000671FA010480080024B0136034B0202A700040784
%4E67880000C0600A4A0412464A051FA02C041FA02D4246032C192D170B12484A051FA02C041FA0
%4E65380000C0802D4448032C062D041FA02D4B1FA002CC4BC600100000140099202000671FA020
%4E61080000C0A01040C8421FA000100000142000671FA0201040C8441FA00010005E202000671F
%4E63E80000C0C0A0104600100063202000671FA010484642051FA02C041FA02D4844032C022D2D
%4E6D480000C0E00340E4002500BDBDBD24D4F2C4F4DC05C285A029A0A0A9F81CC2A1A1FF0010A1
%4E6F680000C100C1C5C285C1C5C285C1C5C285C1C5C28582A90AA0C1C5A005C285A0F906E4BEBE
%4E62980000C120BE06BDBDBDA424D4F2C4F4DC05CB85A028A0A0A9F81BC2A1A1FF10A1CBC5CB85
%4E63E80000C140CBC5CB85CBC5CB85CBC5CB8582A90AA0CBC5A005CB85A0F906E4BEBEBE062C40
%4E6C180000C160E62D062C40222D062D060C42DC4CC446F4480842A9C44A4B01AC1816484C94A9
%4E6EE80000C1805A4622ABAA4444304AA94637C4CC464B4C42D44BE846E48C060C42DC4CC446F4
%4E6D380000C1A0480842A9C44A4B19484C0194A95A4600FFAAAB4444304AA9014647C4CC464B4C
%4E6C880000C1C042D44BE546E48C060E494248494D4C0106A04D4C01FC4A4C4A2F4A400BA94600
%4E69280000C1E001444B010744463B44434B495A001F1746A9015A4BABEF48462244435A444847
%4E69F80000C2003BABAA484A4C4AD3488E06024100030107FF41400B03A98206BD84AB18A9A001
%4E6C980000C220A7818700810185A6FA038485AAC0A9AB01A910E7AAF584A90F02C3A8A91104A6
%4E6E880000C24084A6A0C0FFA7A2D6BE06BD00C0BDA9BDC0BAA31C00CC40C4A9A115A1014101A9
%4E6C080000C26081018403A9A3A9C58167810001A2F24000BEBEBE060000BD1FA0A9220DABFFAA
%4E60680000C280FFA9FFA8FFAB037FFF1FA028671FA02604A7A1671FA02403A7674075BE0600AB
%4E62D80000C2A0A407A98185870EFEA9A60F000DFFA8BFFE85870EFE85870CF8A406AD00691F16
%4E63B80000C2C01A10002000401F00021B40FE0003404A40E14077CC000181A40700818501A4FB
%4E64580000C2E0060000A904000003C4024000061FA02A061FA0280606A5A4CDA603409E060106
%1062480000C30006
%4E63380000D0400102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F20
%4E67580000D0602122232425262728292A2B2C2D2E2F303132333435363738393A3B3C3D3E3F40
%3269180000D08008020B00400040004E980000400040007DC1
%4E6818000BF000060E000078040000000800000000000800000000000800000000000800000000
%4E6758000BF020000800000000000900000000000900000000000A00000000000A00000000000B
%4265E8000BF04000000000000B00000000000B00000000000B00000000000B0000
%0E84280000C2BB

此致、

Hayao

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好、Hayao、

我将把您的查询转发给 Hex 实用程序专家。

此致、

Veena

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

生成十六进制文件时、请使用选项--romwidth=16、您将获得所需的结果。我将以一个非常小的示例进行演示。

以下命令显示了汇编源文件和链接器命令文件。示例已构建。显示映射文件中带有 CRC 值的行。

C:\example>type file.asm
        .sect   "test_section"
        .word   0xaaaa, 0xbbbb, 0xcccc, 0xdddd

C:\example>type file.cmd
SECTIONS
{
    test_section > 0x1000, PAGE 0, crc_table(_crc_test)
    .TI.crctab   > 0x2000, PAGE 0
}

C:\example>cl2000 file.asm -z -o file.out file.cmd -m file.map
<Linking>
warning: no suitable entry-point found; setting to 0

C:\example>type file.map
<... snip ...>

LINKER GENERATED CRC TABLES

_crc_test @ 00002000 records: 1, size/record: 8, table size: 10
        test_section: algorithm=CRC32_PRIME(ID=0), page=0, load addr=00001000, size=00000004, CRC=5a79fb34

<... snip ...>

下一个命令使用--romwidth=16生成十六进制文件。显示了输出。

C:\example>hex2000 -x --romwidth=16 file.out -o file.hex
Translating to Extended Tektronix format...
   "file.out" test_section ==> test_section
   "file.out" .TI.crctab ==> .TI.crctab

C:\example>type file.hex
%1E6D6800001000AAAABBBBCCCCDDDD
%3666780000200000080001000000001000000000040000FB345A79
%0E81E800000000

十六进制文件第二行末尾会显示完整的 CRC 值。请注意、由于 C28x 器件读取和写入32位值的方式、两个16位字的顺序相反。

如果--romwidth=16不使用该怎么办？

C:\example>hex2000 -x file.out -o file.hex
Translating to Extended Tektronix format...
   "file.out" test_section ==> test_section
warning: Data is being written to auto-generated file file.x01
   "file.out" .TI.crctab ==> .TI.crctab

C:\example>type file.hex
%16672800001000AABBCCDD
%2263880000200008010000000004003479
%0E81E800000000


C:\example>type file.x01
%16672800001000AABBCCDD
%2263E8000020000000000010000000FB5A
%0E81E800000000

请注意十六进制实用程序如何发出有关如何自动生成第二个文件的警告。显示了两个生成的文件。奇数字节位于一个文件中、偶数字节位于另一个文件中。为了理解发生这种情况的原因、请首先注意、对于-x 输出格式(扩展 Tektronix)、默认值为-romwidth=8。然后、请在 C28x 汇编工具手册中搜索标题 为将数据分区到输出文件的子章节。

谢谢、此致、

乔治

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

尊敬的乔治：

感谢你的答复。

我在 CCS 属性中将 ROM 宽度指定为16。
因此、我能够检查十六进制文件中的 CRC 值。

我想检查几件事、看看我的理解是否正确。
1.我为"指定 ROM 宽度"指定16的原因是"本例中使用的器件 TMS320F280023存储每个地址16位"、这是正确的吗？
在 CCS 属性中、除了"Specify ROM width"外、还有一个名为"Specify memorywidth"的项目。
我没有在该项目中设置任何内容。假设默认指定16是否正确？
此外、如果需要设置任何其他项目、如果您能告诉我、我将不胜感激。

此致、

Hayao

0 admin 3 年多前

TI__Guru**** 2393725 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

[~ userid="520104" URL"μ C/support/microcontrollers/C2000-microcontrollers-group/C2000/f/C2000-microcontrollers-forum/1117849/tms320f280023-is-ite-quale-the-check-crc-value-generated by the linker-in-the-hex-file/41592#41592]1541392]1'。我为"指定 ROM 宽度"指定16的原因是"本例中使用的器件 TMS320F280023存储每个地址16位"、这是正确的吗？

大部分都是肯定的。十六进制实用程序是20世纪80年代首次开发的。当时、它用于创建用作 EEPROM 编程器输入的文件。在某些配置中、您可以使用 EEPROM 编程器对两个不同的8位宽 EEPROM 存储器芯片进行编程、然后将这些芯片安装在系统上、以便从其中一个芯片读取8位、从另一个芯片读取8位、从而形成一个16位字。即使没有人以这种方式使用它、十六进制实用程序的这种行为仍然存在。要更改此默认行为、请更改--romwidth 设置以匹配目标系统上字的宽度。对于 C28x 系统、这意味着--romwidth=16。

[引用 userid="520104" URL"~/support/microcontrollers/C2000-microcontrollers-group/C2000/f/C2000-microcontrollers-forum/1117849/tms320f280023-is-it-check-the-crc-value-generated by the linker-in-the-hex-file/41592]rom"属性、在"1392#"中指定"rom"宽度"属性、并指定"rom"宽度"。
我没有在该项目中设置任何内容。假设默认指定16是否正确？

是的

谢谢、此致

乔治

C2000™︎ 微控制器（参考译文帖）

C2000™︎ 微控制器（参考译文帖）(Read Only)

[参考译文] TMS320F280023：是否可以检查十六进制文件中由链接器生成的 CRC 值？