请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。
器件型号：TMS320F28069 大家好、我目前正在使用28069的 DSP 进行一个项目。 随着项目的增长、代码量变得越来越大。 最近、编译器告诉我这一点
"../28069_RAM_lnk.cmd", line 121: error #10099-D: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x34e5 page 0. Available memory ranges: RAML0_L3 size: 0x2000 unused: 0x2000 max hole: 0x2000 .text : > RAML0_L3, PAGE = 0
我想我可以自行放大.text。 然后、我尝试通过将 RAML0_L3的大小从0x002000增加到0x004000来放大.text 字段。 这个扩大的区域与 RAML4重叠、RAML4被 .ebss 占用、依此类推、我将其位置更改为 RAML5。 由于 RAML5被 "DMARAML5"占用、我还将 DMARAML5的位置更改为 RAML6。 下面是我的整个 cmd 文件
/*
// TI File $Revision: /main/3 $
// Checkin $Date: March 3, 2011 13:45:43 $
//###########################################################################
//
// FILE: 28069_RAM_lnk.cmd
//
// TITLE: Linker Command File For F28069 examples that run out of RAM
//
// This ONLY includes all SARAM blocks on the F28069 device.
// This does not include flash or OTP.
//
// Keep in mind that L0,L1,L2,L3 and L4 are protected by the code
// security module.
//
// What this means is in most cases you will want to move to
// another memory map file which has more memory defined.
//
//###########################################################################
// $TI Release: $
// $Release Date: $
//###########################################################################
*/
/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For BIOS applications add: F2806x_Headers_BIOS.cmd
// For nonBIOS applications add: F2806x_Headers_nonBIOS.cmd
========================================================= */
/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map */
/* Uncomment this line to include file only for non-BIOS applications */
/* -l F2806x_Headers_nonBIOS.cmd */
/* Uncomment this line to include file only for BIOS applications */
/* -l F2806x_Headers_BIOS.cmd */
/* 2) In your project add the path to <base>\F2806x_headers\cmd to the
library search path under project->build options, linker tab,
library search path (-i).
/*========================================================= */
/* Define the memory block start/length for the F2806x
PAGE 0 will be used to organize program sections
PAGE 1 will be used to organize data sections
Notes:
Memory blocks on F28069 are uniform (ie same
physical memory) in both PAGE 0 and PAGE 1.
That is the same memory region should not be
defined for both PAGE 0 and PAGE 1.
Doing so will result in corruption of program
and/or data.
Contiguous SARAM memory blocks can be combined
if required to create a larger memory block.
*/
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000050, length = 0x0003B0
RAML0_L3 : origin = 0x008000, length = 0x004000 /* RAML0-3 combined for size of .text */
/* in Example_F2806xSWPrioritezedInterrupts */
RESET : origin = 0x3FFFC0, length = 0x000002
FPUTABLES : origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */
IQTABLES : origin = 0x3FDF00, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEA50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
BOOTROM : origin = 0x3FF3B0, length = 0x000C10
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */
RAML5 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L5 */
RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */
RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */
RAML8 : origin = 0x012000, length = 0x002000 /* on-chip RAM block L8 */
USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */
}
SECTIONS
{
/* Setup for "boot to SARAM" mode:
The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart : > BEGIN, PAGE = 0
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} > RAMM0, PAGE = 0
#else
ramfuncs : > RAMM0, PAGE = 0
#endif
#endif
.text : > RAML0_L3, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
.ebss : > RAML5, PAGE = 1
.econst : > RAML5, PAGE = 1
.esysmem : > RAML5, PAGE = 1
IQmath : > RAML0_L3, PAGE = 0
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
/* Allocate FPU math areas: */
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
DMARAML5 : > RAML6, PAGE = 1
DMARAML6 : > RAML6, PAGE = 1
DMARAML7 : > RAML7, PAGE = 1
DMARAML8 : > RAML8, PAGE = 1
/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{
IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)
}
*/
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
在这之后、我进行了编译、一切看起来都很好、没有错误、没有警告。 但是、当我在电路板上运行此代码时、我可以从"Expressions"窗口中看到我的所有变量都是随机变化的。 代码似乎已失控。
我已经从数据表中读取了存储器映射、L0到 L3看起来与 L4不同、L0到 L3是 DPSARAM、而 L4是 SARAM。 这是因为这种差异，.text 永远不应该使用 L4吗？
有人能 向我解释一下吗？ 衷心感谢您的帮助！
