[参考译文] TMS320F28054F：用于 TMS320F28054F Motorware 应用软件的闪存 API

您好、Seol、

我们的团队将对此进行审核、并在一天或两天内回复您。  谢谢你。

此致、

Vamsi

Seol、

在这个函数之前、客户是否执行了 memcpy 函数调用来将闪存内容复制到 RAM？  我想、在链接器中、他们可能已经定义了经过一个特定点的代码、以加载到闪存、但从 RAM 运行。  如果代码在 memcopy 之前跳转到 RAM、则会将其取出。

另一件事是、我要确保看门狗按照所需的规格复位或禁用(对于调试、他们现在可以禁用它)、以确保不会跳闸。

最棒的

Matthew

您好、Matthew、

闪存存储器程序是通过引用 Flash2805x_API_Quickstart.pdf 来实现的

因此 、也设置了对存储器复制例程和函数的调用。

[F28054F.cmd 文件]

[main.c、main 函数]

此外，在 FLASH_program()被执行前，安全装置和中断被禁用。

洪

让我让其他人看看这个帖子、看看这是否是特定于电机设备的帖子。

最棒的

Matthew

洪

您能否共享完整的.cmd 文件？  由于这是"F"版本、我们需要使用用户代码保留在0x8000-0x8800之外、因为它是为 Motorware 函数保留的。

最棒的

Matthew

您好、Matthew、

下面显示了正在使用的.CMD 文件。

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   RAML1_L3			: origin = 0x008800, length = 0x001800		/* on-chip RAM block L1~L3 */
   FLASHJ			: origin = 0x3E8000, length = 0x001000		/* on-chip FLASH */
   FLASHI			: origin = 0x3E9000, length = 0x001000		/* on-chip FLASH */
   FLASHH			: origin = 0x3EA000, length = 0x002000		/* on-chip FLASH */
   FLASHG			: origin = 0x3EC000, length = 0x001FFE		/* on-chip FLASH */
/*   FLASHF			: origin = 0x3EE000, length = 0x002000		/* on-chip FLASH */
/*   FLASHE			: origin = 0x3F0000, length = 0x002000		/* on-chip FLASH */
/*   FLASHD			: origin = 0x3F2000, length = 0x002000		/* on-chip FLASH */
   FLASHC_F			: origin = 0x3EE000, length = 0x008000		/* on-chip FLASH */
   FLASHA			: origin = 0x3F7000, length = 0x000FFE		/* on-chip FLASH */
//   BEGIN			: origin = 0x3F7FFE, length = 0x000002		/* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   BEGIN			: origin = 0x3EDFFE, length = 0x000002		/* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   
   Z1_SCC_ROM		: origin = 0x3F8000, length = 0x000400		/* Zone 1 Safe-Copy Code Secure ROM */
   Z2_SCC_ROM		: origin = 0x3F8400, length = 0x000400		/* Zone 2 Safe-Copy Code Secure ROM */ 
   Z1_SECURE_ROM	: origin = 0x3F8808, length = 0x0044F8		/* Z1 Secure ROM */
   
   IQTABLES   		: origin = 0x3FDB52, length = 0x000b50  /* IQ Math Tables in Boot ROM */
   IQTABLES2  		: origin = 0x3FE6A2, length = 0x00008C  /* IQ Math Tables in Boot ROM */
   IQTABLES3  		: origin = 0x3FE72E, length = 0x0000AA  /* IQ Math Tables in Boot ROM */


   DCSM_OTP_Z2_P0	: origin = 0x3D7800, length = 0x000004		/* Part of Z1 OTP.  LinkPointer/JTAG lock/ Boot Mode */
   DCSM_OTP_Z1_P0	: origin = 0x3D7A00, length = 0x000006		/* Part of Z2 OTP.  LinkPointer/JTAG lock */
   
   /* DCSM Z1 Zone Select Contents and Reserved Locations (!!Movable!!) */
   /* Z1_DCSM_RSVD must be programmed to all 0x0000 and must immediately follow Z1 Zone Select block */
   DCSM_ZSEL_Z1_P0	: origin = 0x3D7A10, length = 0x000010		/* Part of Z1 OTP.  Z1 password locations / Flash and RAM partitioning */
   Z1_DCSM_RSVD     : origin = 0x3D7A20, length = 0x0001E0	    /* Part of Z1 OTP.  Program with all 0x0000 when Z1 DCSM is in use. */
   
   /* DCSM Z1 Zone Select Contents and Reserved Locations (!!Movable!!) */
   /* Z2_DCSM_RSVD must be programmed to all 0x0000 and must immediately follow Z2 Zone Select block */
   DCSM_ZSEL_Z2_P0	: origin = 0x3D7810, length = 0x000010		/* Part of Z2 OTP.  Z2 password locations / Flash and RAM partitioning  */
   Z2_DCSM_RSVD     : origin = 0x3D7820, length = 0x0001E0		/* Program with all 0x0000 when Z2 DCSM is in use. */
   
   ROM				: origin = 0x3FF27C, length = 0x000D44		/* Boot ROM */
   RESET			: origin = 0x3FFFC0, length = 0x000002		/* part of boot ROM  */
   VECTORS			: origin = 0x3FFFC2, length = 0x00003E		/* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   BOOT_RSVD		: origin = 0x000000, length = 0x000050		/* Part of M0, BOOT rom will use this for stack */
   RAMM0			: origin = 0x000050, length = 0x0003B0		/* on-chip RAM block M0 */
   RAMM1			: origin = 0x000400, length = 0x000400		/* on-chip RAM block M1 */
   //RAML3			: origin = 0x009000, length = 0x001000		/* on-chip RAM block L3 */
   FLASHB			: origin = 0x3F6000, length = 0x001000		/* on-chip FLASH */

}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{
   /* Allocate program areas: */
   .cinit			: > FLASHC_F			PAGE = 0
   .pinit			: > FLASHC_F,			PAGE = 0
   .text			: > FLASHC_F			PAGE = 0
   codestart		: > BEGIN				PAGE = 0

   ramfuncs            : LOAD = FLASHH,
                         RUN = RAML1_L3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   dcsm_otp_z1		: > DCSM_OTP_Z1_P0		PAGE = 0
   dcsm_otp_z2		: > DCSM_OTP_Z2_P0		PAGE = 0
   
   dcsm_zsel_z1		: > DCSM_ZSEL_Z1_P0		PAGE = 0
   dcsm_rsvd_z1		: > Z1_DCSM_RSVD		PAGE = 0
   dcsm_zsel_z2		: > DCSM_ZSEL_Z2_P0		PAGE = 0
   dcsm_rsvd_z2		: > Z2_DCSM_RSVD		PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack			: > RAMM0				PAGE = 1
   .ebss			: > RAML1_L3			PAGE = 0
   .esysmem			: > RAML1_L3			PAGE = 0

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst			: > FLASHC_F			PAGE = 0
   .switch			: > FLASHC_F			PAGE = 0

   /* Allocate IQ math areas: */
   IQmath			: > FLASHC_F			PAGE = 0            /* Math Code */
   IQmathTables		: > IQTABLES,			PAGE = 0, TYPE = NOLOAD

  /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2	: > IQTABLES2,			PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
    /* Uncomment the section below if calling the IQNasin() or IQasin()
       functions from the IQMath.lib library in order to utilize the
       relevant IQ Math table in Boot ROM (This saves space and Boot ROM
       is 1 wait-state). If this section is not uncommented, IQmathTables2
       will be loaded into other memory (SARAM, Flash, etc.) and will take
       up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables3	: > IQTABLES3,			PAGE = 0, TYPE = NOLOAD
    {

               IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

    }
    */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset			: > RESET,				PAGE = 0, TYPE = DSECT
   vectors			: > VECTORS				PAGE = 0, TYPE = DSECT

}

您谈到的存储器区域未被使用。

我在通过 Example_Flash2805x_API 示例再次测试后解决了这个问题。

我通过将示例中包含的 F2805x_GlobalVariableDefs.c 和 F2805x_Device.h 头文件添加到现有项目中来解决该问题。

但是、在添加的文件中的现有源代码中定义的寄存器文件声明必须注释掉。

之后、与示例代码中一样、在执行后可以访问闪存存储器而不会出现任何问题。

感谢您帮助解决问题。

此致、

Seol

您好、Matthew、

Flash2805x_API_Quickstart.pdf 文件中仅指定变量定义、并且不包含是否添加该文件的内容。

因此、我希望其他工程师通过更新详细信息(例如添加相应的文件)来使用 API 会有所帮助。

此致、

Seol