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[参考译文] TMS320F28384S:向 CM 添加 SYSBIOS

Guru**** 2392905 points
Other Parts Discussed in Thread: SYSBIOS, C2000WARE

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1253886/tms320f28384s-adding-sysbios-to-the-cm

器件型号:TMS320F28384S
Thread 中讨论的其他器件:SYSBIOSC2000WARE

大家好、我正在尝试向我一直在修改的 enet_lwip TCP 示例 TI 工程中添加 sysbios。

我在 enet_lwip 文件中修改了 cmd 文件来包含这个引导段、但是有很多选项、所以我很不确定这是否正确:

SECTIONS
{
    boot : > CMBANK0_SECTOR0 PAGE = 0
    {
        -l"C:\ti\bios_6_83_00_18\packages\ti\targets\arm\rtsarm\lib\boot.aem4" <boot_cg.o28FP> (.text)
    }
}

但是、我遇到编译器错误、因为这是不受支持的器件。

我在链接器和库路径中有 sysbios、并且以下是我的一些工程属性:

对于我可能在这里遗漏的任何想法、都很好、谢谢。

劳拉

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Laura。

    我导入了 F28384S 的 BIOS 示例、其使用的设置如下:

    看起来该编程器支持通用器件系列名称、而不是平台字段中的特定器件型号。

    请注意、我们不再建议在新项目中使用 SYS/BIOS。 如果可以、请考虑改用 FreeRTOS。 我们在内核目录中的最新版本的 C2000Ware 中提供了一个端口。

    惠特尼

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    谢谢您的回答、惠特尼。

    那么、我还有一个问题、在同一标题下。 现在、我已将 SysBios 添加到 CM 并成功编译、我将无法再使用调试器运行 CM。

    本质上、我得到了与 这个 e2e 发布相同的错误、在该发布中、当尝试加载程序并在主函数的开头暂停时、断点就会用尽。 我是按照岗位上的建议去做的。 我在 CM 上命中调试器并看到0个断点被启用:

    C28xx_CPU1: GEL Output: 
    Memory Map Initialization Complete
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Start ... 
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output: 
     CPU2 is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
     CM is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
    C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Start ... 
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output: 
     CPU2 is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
     CM is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Start ... 
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output: 
     CPU2 is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
     CM is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CM to reach wait boot loop.)
    Cortex_M4_0: GEL Output: Memory Map Initialization Complete
    Cortex_M4_0: GEL Output: Windowed Watchdog Enabled
    Cortex_M4_0: GEL Output: UART0 Enabled
    Cortex_M4_0: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: AutoRun: Target not run as breakpoint could not be set: _JobHardwareBreakpoint::ARM_DEBUG_V7M_fpb_add_breakpoint: FPB : All resources are in use.[25062]
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Logical Breakpoints: 107
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Software Physical Breakpoints: 109
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Legacy Hardware Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated 55 Hardware Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Thread Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: Enabled: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: Disabled: 5
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$IOE$$"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Process CIO
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$EXITE"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Terminate Program Execution
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "SVC_Handler"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Semi hosting
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$IO$$"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Process CIO
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$EXIT"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Terminate Program Execution
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system

    但是、如果我 在正常运行 CM 时运行相同的脚本、它会显示启用了2个断点:

    Cortex_M4_0: AutoRun: Target not run as breakpoint could not be set: _JobHardwareBreakpoint::ARM_DEBUG_V7M_fpb_add_breakpoint: FPB : All resources are in use.[25062]
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Logical Breakpoints: 122
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Software Physical Breakpoints: 121
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Legacy Hardware Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated 55 Hardware Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Thread Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: Enabled: 2
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Type: Breakpoint
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Location: "C$$IO$$" (0x219116)
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Process CIO
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Type: Breakpoint
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Location: "C$$EXIT" (0x213064)
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Terminate Program Execution
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: Disabled: 3
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$IOE$$"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Process CIO
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$EXITE"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Terminate Program Execution
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "SVC_Handler"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Semi hosting
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    

    我在  Cortex M4上的这篇 e2e 文章中针对这两个项目尝试了禁用断点(C28x 项目和 CM 项目都提供了用于禁用 M4上断点的选项):

    但此时、项目将运行、而无需在 main 的开始处暂停。 因此、我无法进行任何 调试、因为调试似乎不起作用、除非"调试多个内核"中概述的特定序列正常工作、并且在播放 CM 可执行文件之前、我没有机会加载 CM.out 并播放 CPU1的 exe。

    奇怪的是、如果我在此时运行转储断点(当它在没有权限的情况下开始运行时)、它仍然显示为启用2:

    C28xx_CPU1: GEL Output: 
    Memory Map Initialization Complete
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Start ... 
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output: 
     CPU2 is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
     CM is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
    C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Start ... 
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output: 
     CPU2 is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
     CM is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Start ... 
    C28xx_CPU1: GEL Output: 
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output: 
     CPU2 is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output: 
     CM is out of reset and configured to wait boot.
     (If you connected previously, may have to resume CM to reach wait boot loop.)
    Cortex_M4_0: GEL Output: Memory Map Initialization Complete
    Cortex_M4_0: GEL Output: Windowed Watchdog Enabled
    Cortex_M4_0: GEL Output: UART0 Enabled
    Cortex_M4_0: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Logical Breakpoints: 85
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Software Physical Breakpoints: 84
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Legacy Hardware Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated 55 Hardware Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: Total Allocated Thread Physical Breakpoints: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: Enabled: 2
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Type: Breakpoint
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Location: "C$$IO$$" (0x219116)
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Process CIO
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Type: Breakpoint
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Location: 0x2134d8
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Finish Auto Run
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: Disabled: 3
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$EXITE"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Terminate Program Execution
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Type: Breakpoint
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Location: "C$$EXIT" (0x213064)
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Terminate Program Execution
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system
    
    Cortex_M4_0: Breakpoint Manager Dump: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Hardware Configuration
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Location: "C$$IOE$$"
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Debugger Response
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Condition: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Skip Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 			Current Count: 0
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Action: Process CIO
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Miscellaneous
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Group: Default Group
    
    Cortex_M4_0: Breakpoint Manager Dump: 		Name: 
    
    Cortex_M4_0: Breakpoint Manager Dump: 	Breakpoint set by the system

    我设置的任何软件断点都不会被命中、而且由于没有资源、我也不能设置硬件断点。 我还尝试了在 CM 上禁用硬件断点的不同组合、都没有效果。

    为了获得一个基准、 我返回到 C2000中提供的原始 enet_lwip 示例并向其中添加了 SysBios、并使用相应的 TI 控制卡而不是我的定制电路板、我得到同样的完全一样的错误、没有任何差异、 (事实上这些屏幕截图和控制台日志来自该项目)、因此与我的特定电路板或应用无关。

    可以进行哪些更改以便能够  通过 CCS 调试器运行基于 SYSBIOS 的 CM、其中包含 lwIP 栈?

    谢谢。

    劳拉

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    在屏幕截图中、显示"Enable CIO function use"(启用 CIO 功能使用)框仍然处于选中状态。 如果您取消选中该复选框、它是否会产生任何差异?

    当您停止应用时、它卡在哪里? 它可能会卡在 pre-main()初始化代码中的某处,这就是它从未停止在 main()的原因。 在 SYS/BIOS cfg 文件中使用哪些引导模块设置?

    在此主题中给出了一些 关于集成 SYS/BIOS 和 C2000Ware 示例的建议。 您可以查看是否有任何内容错过了。

    惠特尼