[参考译文] TMS320F28335：CPU 在断电/接通后不运行、但是在闪存加载后运行

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Other Parts Discussed in Thread: UNIFLASH, C2000WARE

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1246641/tms320f28335-cpu-is-not-running-after-power-off-on-but-it-runs-after-flash-load

器件型号：TMS320F28335
主题中讨论的其他器件：UNIFLASH、 C2000WARE

您好！

我关注的是我在 https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1225088/tms320f28335-cpu-is-not-running-after-power-off-on-but-it-runs-after-flash-load/4665801上的这个问题、该问题已关闭、但我没有解决我的问题。因此、这里存在互补问题。

基本上、在关闭/打开 DSP 的电源之后、DSP 未运行、但它在使用 Uniflash 加载程序之后运行。

在 MatthewRate 提出的最后一个问题后、以下是我在调试中发现的问题：

CPU 复位后、我的程序在这里等待：

然后、在运行和停止之后、它被锁定在这里：

(在程序之外)。

我试图在未执行复位的情况下解决调试会话、程序首先在这里等待：

然后它会按预期工作。

感谢所有可以帮助我的人。

祝您愉快！

最棒的酒店

马特奥

2 年多前

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

Matteo、

请给我另一天回去,重新审视我们在上一篇文章做的一切。我怀疑闪存入口点没有编程、或者我们没有根据需要跳至闪存引导入口点。当我们加载闪存时、code composer 中有一项设置会让我们直接进入 main 并跳过 Brom、基本上是为我们进行这种设置、这就是该方法有效的原因。

此致！

马修

0 admin 2 年多前

TI__Guru**** 2591340 points

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Matteo、

对器件进行刷写后、您能否打开内存浏览器并将其设置为0x33FFF6、能否对地址0x33FFF6和0x33FFF7处的数据进行图片处理。这应该是您应用代码的地址(它也许不是"main"、因为在 code_start_branch.asm 文件中有一些发生在 main 之前的 pre-main 代码)。

我们还可以尝试加载和复位(就像在第一步中所做的那样)、但在运行之前、我要加载位于 C2000Ware 中的引导 ROM 符号、此处为：C：\ti\cc2000\C2000Ware_4_03_00_00\libraries\boot_rom\F2833x\v2_0\rom_Sources\Debug

下面是"Run"->"Load"、"Load symbols"。

然后、我们可以单步执行引导 ROM C 代码、并确定如何获取 SB 0、UNC"陷阱"类型代码。

此致！

马修

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好、Matthey：

非常感谢您的回答。

以下是我对 uniflash 的发现：

刷写 DSP 之后(0x33FFF6和 0x33FFF7中的 FFFF) ：

在 CCS 的 dasassembly 中、我得到了：

33fff6：FFFF ITRAP1
33fff7：FFFF ITRAP1

我尝试加载引导 ROM 符号、没有看到任何区别。

以下是重新放置 CPU 后的反汇编记录

e2e.ti.com/.../avec_5F00_reset.mp4

此致

Matt é o

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

Matt é o,

你可以将你的 cmd 复制到此线程(或确保它没有改变)；这个位置全部为0xFFFF 这一事实意味着链接器没有为引导至闪存地址位置分配任何内容；我们应该看到链接器中有一些内容是特意将这2个字分配给标签、通常是 begin 或 code_start 之类的内容。

此致！

马修

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

Matthew 您好！

我在 CMD 中注意到了这一部件、您谈到的 Begin 就是：

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */
RAMFUNCS : origin = 0x008000, length = 0x003000 /* on-chip RAM block L0 to L2 */
ZONE6 : origin = 0x100000, length = 0x100000 /* XINTF zone 6 */
ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */
BEGIN_FLASH_APPLI : origin = 0x3002FE, length = 0x000002 /* Part of FLASHH. Used for Watt booloader FLASH_APPLIcation entry point. */
FLASH_APPLI : origin = 0x300300, length = 0x02FD00 /* Part of FLASHH, FLASHG, FLASHF, FLASHE, FLASHD, FLASHC used for application*/
FLASHA : origin = 0x338000, length = 0x007F80 /* on-chip FLASHA, used for bootloader program */
CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x33FFF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
OTP : origi²n = 0x380400, length = 0x000400 /* on-chip OTP */
ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */

//IQTABLES : origin = 0x3FE000, length = 0x000b50 /* IQ Math Tables in Boot ROM */
//IQTABLES2 : origin = 0x3FEB50, length = 0x00008c /* IQ Math Tables in Boot ROM */
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* FPU Tables in Boot ROM */
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

这里是.cmd 文件、

非常感谢

/****************************************************************************
*
* Copyright (c) 2012 by Watt Consulting
*
* This software is copyrighted by and is the sole property of
* Watt Consulting. All rights, title, ownership, or other interests
* in the software remain the property of Watt Consulting. This
* software may only be used in accordance with the corresponding
* license agreement. Any unauthorized use, duplication, transmission,
* distribution, or disclosure of this software is expressly forbidden.
*
* This Copyright notice may not be removed or modified without prior
* written consent of Watt Consulting.
*
* Watt Consulting reserves the right to modify this software without notice.
*
* Watt Consulting
* 23 rue Alexis de Tocqueville
* 92160 Antony, FRANCE
* contact@watt-consulting.com
****************************************************************************/

/****************************************************************************
*
* CONFIDENTIAL NOTICE
*
* This document contains information confidential and proprietary to
* Watt Consulting .The information may not be used, disclosed or reproduced
* without the prior written authorization of Watt Consulting and those so
* authorized may only use the information for the purpose of evaluation
* consistent with authorization. Reproduction of any section of this document
* must include this legend.
****************************************************************************/

//=============================================================================
///
/// @file 28335Application_FLASH.cmd
///
/// @brief Linker command file for flash programming of bootloader
///
/// @author Watt Consulting Team
//=============================================================================

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */
RAMFUNCS : origin = 0x008000, length = 0x003000 /* on-chip RAM block L0 to L2 */
ZONE6 : origin = 0x100000, length = 0x100000 /* XINTF zone 6 */
ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */
BEGIN_FLASH_APPLI : origin = 0x3002FE, length = 0x000002 /* Part of FLASHH. Used for Watt booloader FLASH_APPLIcation entry point. */
FLASH_APPLI : origin = 0x300300, length = 0x02FD00 /* Part of FLASHH, FLASHG, FLASHF, FLASHE, FLASHD, FLASHC used for application*/
FLASHA : origin = 0x338000, length = 0x007F80 /* on-chip FLASHA, used for bootloader program */
CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x33FFF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
OTP : origin = 0x380400, length = 0x000400 /* on-chip OTP */
ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */

//IQTABLES : origin = 0x3FE000, length = 0x000b50 /* IQ Math Tables in Boot ROM */
//IQTABLES2 : origin = 0x3FEB50, length = 0x00008c /* IQ Math Tables in Boot ROM */
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* FPU Tables in Boot ROM */
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */

BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMM2 : origin = 0x002000, length = 0x001000 /* on-chip RAM block M2 */
RAM_GLOBAL_VAR : origin = 0x00B000, length = 0x004B00 /* on-chip RAM block L3 to L6 and part of L7*/
RAM_ADCRESULT : origin = 0x00FB00, length = 0x000400 /* on-chip RAM block last part of L7*/
ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */
FLASHB : origin = 0x330000, length = 0x008000 /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

/* Allocate program areas: */
.cinit : > FLASH_APPLI PAGE = 0
.pinit : > FLASH_APPLI, PAGE = 0
.text : > FLASH_APPLI PAGE = 0
codestart : > BEGIN_FLASH_APPLI PAGE = 0
ramfuncs : LOAD = FLASH_APPLI,
RUN = RAMFUNCS,/*RAML0,*/
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0

.FPUtables : LOAD = FLASH_APPLI
RUN = RAMFUNCS,
LOAD_START(_FPUtablesLoadStart),
LOAD_END(_FPUtablesLoadEnd),
RUN_START(_FPUtablesRunStart),
PAGE = 0
{
-l rts2800_fpu32_fast_supplement.lib
//-l rts2800_fpu32_fast_supplement_coff.lib
}

csmpasswds : > CSM_PWL PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAM_GLOBAL_VAR PAGE = 1
.esysmem : > RAMM2 PAGE = 1
.sysmem : > RAM_GLOBAL_VAR PAGE = 1

/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASH_APPLI PAGE = 0
.switch : > FLASH_APPLI PAGE = 0

/* Allocate IQ math areas: */
//IQmath : > FLASH_APPLI PAGE = 0 /* Math Code */
//IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

}
*/

FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD

/* Allocate DMA-accessible RAM sections: */
DMARAML4 : > RAM_ADCRESULT, PAGE = 1
DMARAML5 : > RAM_ADCRESULT, PAGE = 1
DMARAML6 : > RAM_ADCRESULT, PAGE = 1
DMARAML7 : > RAM_ADCRESULT, PAGE = 1

/* Allocate 0x400 of XINTF Zone 7 to storing data */
ZONE7DATA : > ZONE7B, PAGE = 1

/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT

/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
CRC16_TABLE : > RAM_GLOBAL_VAR PAGE = 1
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/

/*
// TI File $Revision: /main/8 $
// Checkin $Date: June 2, 2008 11:12:24 $
//###########################################################################
//
// FILE: DSP2833x_Headers_nonBIOS.cmd
//
// TITLE: DSP2833x Peripheral registers linker command file
//
// DESCRIPTION:
//
// This file is for use in Non-BIOS applications.
//
// Linker command file to place the peripheral structures
// used within the DSP2833x headerfiles into the correct memory
// mapped locations.
//
// This version of the file includes the PieVectorTable structure.
// For BIOS applications, please use the DSP2833x_Headers_BIOS.cmd file
// which does not include the PieVectorTable structure.
//
//###########################################################################
*/

// Version History:
//=============================================================================
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|=======|================================================
// 1.0 | 02 Jun 2008 | TI | Release Version
// 2.0 | 06 Sep 2011 | WattC | ePWM mapping changed from 0x68xx to 0x58xx for DMA access
//=============================================================================

MEMORY
{
PAGE 0: /* Program Memory */

PAGE 1: /* Data Memory */

DEV_EMU : origin = 0x000880, length = 0x000180 /* device emulation registers */
FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH registers */
CSM : origin = 0x000AE0, length = 0x000010 /* code security module registers */

ADC_MIRROR : origin = 0x000B00, length = 0x000010 /* ADC Results register mirror */

XINTF : origin = 0x000B20, length = 0x000020 /* external interface registers */

CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/

PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */
PIE_VECT : origin = 0x000D00, length = 0x000100 /* PIE Vector Table */

DMA : origin = 0x001000, length = 0x000200 /* DMA registers */

MCBSPA : origin = 0x005000, length = 0x000040 /* McBSP-A registers */
MCBSPB : origin = 0x005040, length = 0x000040 /* McBSP-B registers */

ECANA : origin = 0x006000, length = 0x000040 /* eCAN-A control and status registers */
ECANA_LAM : origin = 0x006040, length = 0x000040 /* eCAN-A local acceptance masks */
ECANA_MOTS : origin = 0x006080, length = 0x000040 /* eCAN-A message object time stamps */
ECANA_MOTO : origin = 0x0060C0, length = 0x000040 /* eCAN-A object time-out registers */
ECANA_MBOX : origin = 0x006100, length = 0x000100 /* eCAN-A mailboxes */

ECANB : origin = 0x006200, length = 0x000040 /* eCAN-B control and status registers */
ECANB_LAM : origin = 0x006240, length = 0x000040 /* eCAN-B local acceptance masks */
ECANB_MOTS : origin = 0x006280, length = 0x000040 /* eCAN-B message object time stamps */
ECANB_MOTO : origin = 0x0062C0, length = 0x000040 /* eCAN-B object time-out registers */
ECANB_MBOX : origin = 0x006300, length = 0x000100 /* eCAN-B mailboxes */

// EPWM1 : origin = 0x006800, length = 0x000022 /* Enhanced PWM 1 registers */
// EPWM2 : origin = 0x006840, length = 0x000022 /* Enhanced PWM 2 registers */
// EPWM3 : origin = 0x006880, length = 0x000022 /* Enhanced PWM 3 registers */
// EPWM4 : origin = 0x0068C0, length = 0x000022 /* Enhanced PWM 4 registers */
// EPWM5 : origin = 0x006900, length = 0x000022 /* Enhanced PWM 5 registers */
// EPWM6 : origin = 0x006940, length = 0x000022 /* Enhanced PWM 6 registers */

EPWM1 : origin = 0x005800, length = 0x000022 /* Enhanced PWM 1 registers */
EPWM2 : origin = 0x005840, length = 0x000022 /* Enhanced PWM 2 registers */
EPWM3 : origin = 0x005880, length = 0x000022 /* Enhanced PWM 3 registers */
EPWM4 : origin = 0x0058C0, length = 0x000022 /* Enhanced PWM 4 registers */
EPWM5 : origin = 0x005900, length = 0x000022 /* Enhanced PWM 5 registers */
EPWM6 : origin = 0x005940, length = 0x000022 /* Enhanced PWM 6 registers */

ECAP1 : origin = 0x006A00, length = 0x000020 /* Enhanced Capture 1 registers */
ECAP2 : origin = 0x006A20, length = 0x000020 /* Enhanced Capture 2 registers */
ECAP3 : origin = 0x006A40, length = 0x000020 /* Enhanced Capture 3 registers */
ECAP4 : origin = 0x006A60, length = 0x000020 /* Enhanced Capture 4 registers */
ECAP5 : origin = 0x006A80, length = 0x000020 /* Enhanced Capture 5 registers */
ECAP6 : origin = 0x006AA0, length = 0x000020 /* Enhanced Capture 6 registers */

EQEP1 : origin = 0x006B00, length = 0x000040 /* Enhanced QEP 1 registers */
EQEP2 : origin = 0x006B40, length = 0x000040 /* Enhanced QEP 2 registers */

GPIOCTRL : origin = 0x006F80, length = 0x000040 /* GPIO control registers */
GPIODAT : origin = 0x006FC0, length = 0x000020 /* GPIO data registers */
GPIOINT : origin = 0x006FE0, length = 0x000020 /* GPIO interrupt/LPM registers */

SYSTEM : origin = 0x007010, length = 0x000020 /* System control registers */
SPIA : origin = 0x007040, length = 0x000010 /* SPI-A registers */
SCIA : origin = 0x007050, length = 0x000010 /* SCI-A registers */
XINTRUPT : origin = 0x007070, length = 0x000010 /* external interrupt registers */

ADC : origin = 0x007100, length = 0x000020 /* ADC registers */

SCIB : origin = 0x007750, length = 0x000010 /* SCI-B registers */

SCIC : origin = 0x007770, length = 0x000010 /* SCI-C registers */

I2CA : origin = 0x007900, length = 0x000040 /* I2C-A registers */

CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations. */

PARTID : origin = 0x380090, length = 0x000001 /* Part ID register location */
}

SECTIONS
{
PieVectTableFile : > PIE_VECT, PAGE = 1

/*** Peripheral Frame 0 Register Structures ***/
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
AdcMirrorFile : > ADC_MIRROR, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
DmaRegsFile : > DMA, PAGE = 1

/*** Peripheral Frame 3 Register Structures ***/
McbspaRegsFile : > MCBSPA, PAGE = 1
McbspbRegsFile : > MCBSPB, PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/
ECanaRegsFile : > ECANA, PAGE = 1
ECanaLAMRegsFile : > ECANA_LAM PAGE = 1
ECanaMboxesFile : > ECANA_MBOX PAGE = 1
ECanaMOTSRegsFile : > ECANA_MOTS PAGE = 1
ECanaMOTORegsFile : > ECANA_MOTO PAGE = 1

ECanbRegsFile : > ECANB, PAGE = 1
ECanbLAMRegsFile : > ECANB_LAM PAGE = 1
ECanbMboxesFile : > ECANB_MBOX PAGE = 1
ECanbMOTSRegsFile : > ECANB_MOTS PAGE = 1
ECanbMOTORegsFile : > ECANB_MOTO PAGE = 1

EPwm1RegsFile : > EPWM1 PAGE = 1
EPwm2RegsFile : > EPWM2 PAGE = 1
EPwm3RegsFile : > EPWM3 PAGE = 1
EPwm4RegsFile : > EPWM4 PAGE = 1
EPwm5RegsFile : > EPWM5 PAGE = 1
EPwm6RegsFile : > EPWM6 PAGE = 1

ECap1RegsFile : > ECAP1 PAGE = 1
ECap2RegsFile : > ECAP2 PAGE = 1
ECap3RegsFile : > ECAP3 PAGE = 1
ECap4RegsFile : > ECAP4 PAGE = 1
ECap5RegsFile : > ECAP5 PAGE = 1
ECap6RegsFile : > ECAP6 PAGE = 1

EQep1RegsFile : > EQEP1 PAGE = 1
EQep2RegsFile : > EQEP2 PAGE = 1

GpioCtrlRegsFile : > GPIOCTRL PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
GpioIntRegsFile : > GPIOINT PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPIA, PAGE = 1
SciaRegsFile : > SCIA, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
ScibRegsFile : > SCIB, PAGE = 1
ScicRegsFile : > SCIC, PAGE = 1
I2caRegsFile : > I2CA, PAGE = 1

/*** Code Security Module Register Structures ***/
CsmPwlFile : > CSM_PWL, PAGE = 1

/*** Device Part ID Register Structures ***/
PartIdRegsFile : > PARTID, PAGE = 1

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

//=============================================================================
///
/// @file MetadataHeader.cmd
///
/// @brief Linker command file for metadata shared between Bootloader and Application
///
/// @author Watt Consulting Team
//=============================================================================

MEMORY
{
PAGE 0: /* Program Memory */

UPGRADE_METADATA : origin = 0x300000, length = 0x000004 /* upgrade metadata registers */
APPLICATION_METADATA : origin = 0x300004, length = 0x0002FA /* upgrade metadata registers */

PAGE 1: /* Data Memory */

}

SECTIONS
{
UpgradeMetadataFile : > UPGRADE_METADATA , PAGE = 0
ApplicationMetadataFile : > APPLICATION_METADATA, PAGE = 0

SharedDataFile : > RAMM0 , PAGE = 1
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 admin 2 年多前

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Matteo、

在第1个.cmd 文件的部分中、start 需要被分配给"开始"、因为这是引导 ROM 将用来分支到您的代码中的地址。然后、code_start.asm 将分支至 main。

此致！

马特

0 admin 2 年多前

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Matthew 您好！

我试图把0x303348地址放在开始,因为它应该是我的入口点根据这张图片:

但我得到了这个错误：

开始内存范围与现有内存范围 FLASH_appli 重叠

再次为您提供我的 cmd 文件：

ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */
RAMFUNCS : origin = 0x008000, length = 0x003000 /* on-chip RAM block L0 to L2 */
ZONE6 : origin = 0x100000, length = 0x100000 /* XINTF zone 6 */
ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */
BEGIN_FLASH_APPLI : origin = 0x3002FE, length = 0x000002 /* Part of FLASHH. Used for Watt booloader FLASH_APPLIcation entry point. */
FLASH_APPLI : origin = 0x300300, length = 0x02FD00 /* Part of FLASHH, FLASHG, FLASHF, FLASHE, FLASHD, FLASHC used for application*/
FLASHA : origin = 0x338000, length = 0x007F80 /* on-chip FLASHA, used for bootloader program */
CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x303348, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
OTP : origin = 0x380400, length = 0x000400 /* on-chip OTP */
ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */

我应该把什么放在闪屏应用程序?

此致

Matt é o

0 admin 2 年多前

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Matteo、

您可以BEGIN_FLASH_APPLI从链接器的顶部删除该段；只需根据需要将 flash_appli 分配给.text。

链接器的新段如下所示：

/* Allocate program areas: */
.cinit : > FLASH_APPLI PAGE = 0
.pinit : > FLASH_APPLI, PAGE = 0
.text : > FLASH_APPLI PAGE = 0
codestart : > BEGIN PAGE = 0

I want to call attention to the next few lines:

ramfuncs : LOAD = FLASH_APPLI,
RUN = RAMFUNCS,/*RAML0,*/

We cannot assign the entire FLASH_APPLI to be a load/run. This is because we need some portion of the "main" to execute the code copy from flash to RAM before running from RAM.

如果返回时、你可以为此保留 begin_flash_appli 部分、并确保在代码中发生 flash_appli 段之前、将从闪存复制到 RAM；这很可能意味着您在 main 中另外需要一个包含大量代码函数的函数、以便对其进行相应放置/复制。

因此、code_start.asm 函数将置于从闪存地址矢量的初始引导处。当该函数完成时,它将自动调用 c_int(它被分配给 main ())。此时、您可以进行所需的 C28x 设置(设置时钟、ISR 等)；然后调用复制代码函数将时间关键代码放入 RAM 中、再调用该函数、该函数将跳转到 RAM 中的该函数。

此致！

马修

0 admin 2 年多前

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Matthew 和

在进入消息的第二部分之前、第一部分没有解决我的问题。

我的重叠是、在开始时将 main 的地址放在闪存应用程序中、因此删除 Begin_FLASH_appli 并没有解决我的问题。

抱歉、我的所有问题、这是我第一次处理链接器文件。

谢谢！

Matt é o

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Matthew 您好！

我回来给你,因为我仍然锁定,因为我以前的答案。你有什么想法吗？

谢谢！

Matt é o

0 admin 2 年多前

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尊敬的 Matteo：

专家今天不在办公室、请期待明天回复。

谢谢！

卢克

0 admin 2 年多前

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Luke、您好！

感谢您提供的信息

0 admin 2 年多前

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Matteo、

是否有可能移除闪存的负载并从 RAM 运行、而直接置于闪存中？我意识到代码执行会更慢、但我想进入我们可以刷写代码并成功启动的状态。

在这种情况下、您会从链接器命令文件中删除 Begin_FLASH_APPL 段、而只需将闪存应用程序(或者这里实际上不需要标签、因为这是代码)/.text 放置到闪存中。

我们需要保留 codestart : > BEGIN PAGE = 0；因为它来自 code_start_branch.asm、需要放置在复位向量位置、以便在引导时首先运行。

此致！

马修

0 admin 2 年多前

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Matthew 您好！

jingwei wang 说：
只需将闪存应用程序(或者此处实际上不需要标签，因为这是代码)/.text 放入闪存即可。

这话什么意思？我确实删除了 Begin_flash_appli，并放置了 codestart：> begin，但由于与闪存应用程序重叠，我仍然无法更改 begin origin，因此我不明白应该将闪存应用程序放置在何处。我不能删除闪存应用程序,因为这些错误...

"...switch"/cmd/28335Application_FLASH.cmd 第131行：错误#10265：没有可用于放置".switch"的有效存储器范围
".../cmd/28335Application_FLASH.cmd "、第131行：错误#10099-D：程序无法装入可用内存、或者该段包含的调用站点需要无法为此段生成的 trampoline。页0中".switch"大小0x4a 的段的对齐/分块定位失败

谢谢！

Matt é o

0 admin 2 年多前

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如果我们重新添加 begin_flash_appli 中的2个字、这应该会为我们提供

BEGIN_FLASH_APPLI : origin = 0x3002FE, length = 0x000002 /* Part of FLASHH. Used for Watt booloader FLASH_APPLIcation entry point. */
FLASH_APPLI : origin = 0x300300, length = 0x02FD00 /* Part of FLASHH, FLASHG, FLASHF, FLASHE, FLASHD, FLASHC used for application*/

更改为

FLASH_appli：origin = 0x3002FE、length = 0x02FD02

我没有考虑 FLASH_appli 会达到100%的利用率。

您能否向我展示一下最初在 begin_flash_appli 中的代码是什么？我假设这只是一个分支/调用？如果是、则不需要这样做、因为 flash_appli 将从 code_start_branch.asm 中获得一个分支。

此致！
马特

0 admin 2 年多前

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好的, 我尝试了这个改变,与 codestart :>开始

jingwei wang 说：

BEGIN_FLASH_APPLI : origin = 0x3002FE, length = 0x000002 /* Part of FLASHH. Used for Watt booloader FLASH_APPLIcation entry point. */
FLASH_APPLI : origin = 0x300300, length = 0x02FD00 /* Part of FLASHH, FLASHG, FLASHF, FLASHE, FLASHD, FLASHC used for application*/

更改为

FLASH_appli：origin = 0x3002FE、length = 0x02FD02
[/报价]
在电源关闭/打开后、仍然存在问题。我假设这是因为我没有好地址在开始(主()地址是303348,在开始我有0x33FFF6地址 )。

jingwei wang 说：
您能给我显示 begin_flash_appli 中的代码，最初是什么吗？

而我不是开始 flash appli 地址,这里是我有什么:

Matt é o
[/quote]

0 admin 2 年多前

TI__Guru**** 2591340 points

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Matteo、

如果您复位器件、然后在地址放置一个断点0x33FFF6并运行、则应在 CODE_START_BRANC.asm 中停止(首先验证它)。

CODE_START_BRANCH 的最后一条指令应该是对主系统0x3002FE 进行函数调用。

让我们看看当您的代码执行时有什么不同。

此致！
马修

0 admin 2 年多前

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Matthew 和

我在0x33FFF6处得到的值、不是在 code_start_branch.asm 中。 (ITRAP1处于 dasassembly 中/"在没有可用调试信息的地址"0x33fff6"处中断、或者在程序代码之外。")

谢谢！

Matt é o

0 admin 2 年多前

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Matt é o,

考虑到我们正在使用的.cmd、这应该是不可能的。基本上这里没有加载任何内容、这将导致 BROM 提取一条非法指令。

您是否能够在 C2000Ware 中构建并加载以下示例：C：\ti\c2000\C2000Ware_5_00_00\device_support\F2833x\examples\flash_F28335

然后查看相同的0x33FFF6地址并验证我们是否看到 CODE_START_BRANCH 加载到这里？

此致！

马修

0 admin 2 年多前

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Matthew 您好！

仅为您提供信息、我会离开办公室超过3周、因此我无法继续处理这一问题。

但是、请保持打开该主题帖、我会在回来后立即更新该主题帖。

谢谢！

Matt é o

0 admin 2 年多前

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Matthew 您好！

"我知道了,我知道。"

使用 FLASH_F28335软件、此处是复位后我在33FFF6中拥有的代码：

然后,在运行程序后,一切都还不错。。。

因此、问题仅与我自己的程序有关。

Matt é o

0 admin 2 年多前

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Matt é o,

感谢更新；您能否比较此示例中的.cmd 文件和您的项目、并查看我们是否可以进行更改以与示例保持一致？

此致！

马修

0 admin 2 年多前

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您好！

有以下区别：

在示例中：

SECTIONS
{

/* Allocate program areas: */
.cinit : > FLASHA PAGE = 0
.pinit : > FLASHA, PAGE = 0
.text : > FLASHA PAGE = 0
codestart : > BEGIN PAGE = 0

在我的文件中;

SECTIONS
{

/* Allocate program areas: */
.cinit : > FLASH_APPLI PAGE = 0
.pinit : > FLASH_APPLI, PAGE = 0
.text : > FLASH_APPLI PAGE = 0
codestart : > BEGIN_FLASH_APPLI PAGE = 0

我在文件中更改了该函数以与示例匹配、但它无法正常工作。

我也聊天 gpt'ed 所有的文件,是他的答案:

存储器定义：
- 内存布局已经过重大修改。各种存储器部分的地址和长度已被更改或重新排列。
- 新的内存段，如RAMFUNCSRAM_GLOBAL_VAR，，RAM_ADCRESULT，RAMM2， FLASH_APPLIRAMM2、FLASH_APPLI和更多的应用已被引入。
- 多个现有段的存储器地址、例如ZONE0ZONE6、ZONE7AFLASHA、、、、 BEGINCSM_PWL、OTP、IQTABLES、、 IQTABLES2FPUTABLESROM、RESET、VECTORS、、 BOOT_RSVDRAMM0RAMM1、ZONE7B、FLASHB、、 FLASH_REGSCSMADC_MIRROR、XINTF、CPU_TIMER0、、 CPU_TIMER1CPU_TIMER2PIE_CTRL，DMA和更多的内容已更改。
- IQTABLESIQTABLES2第二个文件中已注释掉了类似和的某些部分。
段分配：
- 多个区域的章节分配已更改。像.cinit、、.pinit、.text、、、这样的部分 codestartramfuncsFPUtables、csmpasswds、.stack、、 .ebss.esysmem.sysmem、.econst、.switch、、 IQmathIQmathTablesFPUmathTables、DMARAML4、DMARAML5、、 DMARAML6DMARAML7ZONE7DATA.reset、、vectors和.adc_cal已使用新的内存位置进行了更新。
外设寄存器定义：
- 各种外设的寄存器、例如DevEmuRegsFileFlashRegsFile、CsmRegsFile、AdcMirrorFile、、 XintfRegsFileCpuTimer0RegsFile、CpuTimer1RegsFile、CpuTimer2RegsFile、、 PieCtrlRegsFileDmaRegsFileMcbspaRegsFile、McbspbRegsFile、ECanaRegsFile、、 ECanaLAMRegsFileECanaMboxesFileECanaMOTSRegsFile、ECanaMOTORegsFile、ECanbRegsFile、、 ECanbLAMRegsFileECanbMboxesFileECanbMOTSRegsFile、ECanbMOTORegsFile、EPwm1RegsFile、、 EPwm2RegsFileEPwm3RegsFileEPwm4RegsFile、EPwm5RegsFile、EPwm6RegsFile、、 ECap1RegsFileECap2RegsFileECap3RegsFile、ECap4RegsFile、ECap5RegsFile、、 ECap6RegsFileEQep1RegsFileEQep2RegsFile、GpioCtrlRegsFile、GpioDataRegsFile、、 GpioIntRegsFileSysCtrlRegsFileSpiaRegsFile、SciaRegsFile、XIntruptRegsFile、、 AdcRegsFileScibRegsFileScicRegsFile和I2caRegsFile已分配给特定的存储器段。
零件 ID 定义：
- PARTID 寄存器位置的定义已经被修改

我再次给您提供链接器文件、

/****************************************************************************
 *
 *            Copyright (c) 2012 by Watt Consulting
 *
 * This software is copyrighted by and is the sole property of
 * Watt Consulting.  All rights, title, ownership, or other interests
 * in the software remain the property of Watt Consulting.  This
 * software may only be used in accordance with the corresponding
 * license agreement.  Any unauthorized use, duplication, transmission, 
 * distribution, or disclosure of this software is expressly forbidden.
 *
 * This Copyright notice may not be removed or modified without prior
 * written consent of Watt Consulting.
 *
 * Watt Consulting reserves the right to modify this software without notice.
 *
 * Watt Consulting
 * 23 rue  Alexis de Tocqueville
 * 92160 Antony, FRANCE
 * contact@watt-consulting.com
 ****************************************************************************/
 
/****************************************************************************
 *
 *						CONFIDENTIAL NOTICE
 *
 * This document contains information confidential and proprietary to 
 * Watt Consulting .The information may not be used, disclosed or reproduced 
 * without the prior written authorization of Watt Consulting and those so 
 * authorized may only use the information for the purpose of evaluation 
 * consistent with authorization. Reproduction of any section of this document
 *  must include this legend.
 ****************************************************************************/

//=============================================================================
///
/// @file	28335Application_FLASH.cmd
///
/// @brief	Linker command file for flash programming of bootloader
///
/// @author	Watt Consulting Team
//=============================================================================


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   ZONE0      		 	: origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
   RAMFUNCS   			: origin = 0x008000, length = 0x003000     /* on-chip RAM block L0 to L2 */
   ZONE6       			: origin = 0x100000, length = 0x100000     /* XINTF zone 6 */
   ZONE7A      			: origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */
   BEGIN_FLASH_APPLI 	: origin = 0x3002FE, length = 0x000002     /* Part of FLASHH.  Used for Watt booloader FLASH_APPLIcation entry point. */
   FLASH_APPLI 			: origin = 0x300300, length = 0x02FD00     /* Part of FLASHH, FLASHG, FLASHF, FLASHE, FLASHD, FLASHC  used for application*/
   FLASHA      			: origin = 0x338000, length = 0x007F80     /* on-chip FLASHA, used for bootloader program */
   CSM_RSVD    			: origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       			: origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL    			: origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   OTP         			: origin = 0x380400, length = 0x000400     /* on-chip OTP */
   ADC_CAL     			: origin = 0x380080, length = 0x000009     /* ADC_cal function in Reserved memory */
   
   //IQTABLES    			: origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
   //IQTABLES2   			: origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */
   FPUTABLES   			: origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
   ROM         			: origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */        
   RESET       			: origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     			: origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   
   BOOT_RSVD   			: origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   RAMM0       			: origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   RAMM1       			: origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMM2       			: origin = 0x002000, length = 0x001000     /* on-chip RAM block M2 */
   RAM_GLOBAL_VAR       : origin = 0x00B000, length = 0x004B00     /* on-chip RAM block L3 to L6 and part of L7*/
   RAM_ADCRESULT   		: origin = 0x00FB00, length = 0x000400     /* on-chip RAM block last part of L7*/
   ZONE7B      			: origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
   FLASHB      			: origin = 0x330000, length = 0x008000     /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASH_APPLI      PAGE = 0
   .pinit              : > FLASH_APPLI,     PAGE = 0
   .text               : > FLASH_APPLI      PAGE = 0
   codestart           : > BEGIN_FLASH_APPLI       PAGE = 0
   ramfuncs            : LOAD = FLASH_APPLI,
                         RUN = RAMFUNCS,/*RAML0,*/
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0


	.FPUtables : LOAD = FLASH_APPLI
		RUN = RAMFUNCS,
		LOAD_START(_FPUtablesLoadStart),
		LOAD_END(_FPUtablesLoadEnd),
		RUN_START(_FPUtablesRunStart),
		PAGE = 0
		{
		 -l rts2800_fpu32_fast_supplement.lib
		 //-l rts2800_fpu32_fast_supplement_coff.lib
		}

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1       PAGE = 1
   .ebss               : > RAM_GLOBAL_VAR    PAGE = 1
   .esysmem            : > RAMM2       PAGE = 1
   .sysmem             : > RAM_GLOBAL_VAR   PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASH_APPLI      PAGE = 0
   .switch             : > FLASH_APPLI      PAGE = 0

   /* Allocate IQ math areas: */
   //IQmath              : > FLASH_APPLI      PAGE = 0                  /* Math Code */
   //IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD

   /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */

   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
         
   /* Allocate DMA-accessible RAM sections: */
   DMARAML4         : > RAM_ADCRESULT,     PAGE = 1
   DMARAML5         : > RAM_ADCRESULT,     PAGE = 1
   DMARAML6         : > RAM_ADCRESULT,     PAGE = 1
   DMARAML7         : > RAM_ADCRESULT,     PAGE = 1
   
   /* Allocate 0x400 of XINTF Zone 7 to storing data */
   ZONE7DATA        : > ZONE7B,    PAGE = 1

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
   
   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
	CRC16_TABLE			: > RAM_GLOBAL_VAR				PAGE = 1
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/

/*
// TI File $Revision: /main/8 $
// Checkin $Date: June 2, 2008   11:12:24 $
//###########################################################################
//
// FILE:    DSP2833x_Headers_nonBIOS.cmd
//
// TITLE:   DSP2833x Peripheral registers linker command file 
//
// DESCRIPTION: 
// 
//          This file is for use in Non-BIOS applications.
//
//          Linker command file to place the peripheral structures 
//          used within the DSP2833x headerfiles into the correct memory
//          mapped locations.
//
//          This version of the file includes the PieVectorTable structure.
//          For BIOS applications, please use the DSP2833x_Headers_BIOS.cmd file
//          which does not include the PieVectorTable structure.
//
//###########################################################################
*/

// Version History:
//=============================================================================
//  Ver | dd mmm yyyy | Who   | Description of changes
// =====|=============|=======|================================================
//  1.0 | 02 Jun 2008 | TI    | Release Version
//	2.0	| 06 Sep 2011 | WattC | ePWM mapping changed from 0x68xx to 0x58xx for DMA access
//=============================================================================



MEMORY
{
 PAGE 0:    /* Program Memory */

 PAGE 1:    /* Data Memory */
 
   DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
   FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
   CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
  
   ADC_MIRROR  : origin = 0x000B00, length = 0x000010     /* ADC Results register mirror */

   XINTF       : origin = 0x000B20, length = 0x000020     /* external interface registers */
   
   CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers */
   CPU_TIMER1  : origin = 0x000C08, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
   CPU_TIMER2  : origin = 0x000C10, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/

   PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
   PIE_VECT    : origin = 0x000D00, length = 0x000100     /* PIE Vector Table */

   DMA         : origin = 0x001000, length = 0x000200     /* DMA registers */

   MCBSPA      : origin = 0x005000, length = 0x000040     /* McBSP-A registers */
   MCBSPB      : origin = 0x005040, length = 0x000040     /* McBSP-B registers */

   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN-A control and status registers */ 
   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN-A local acceptance masks */
   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN-A message object time stamps */
   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN-A object time-out registers */
   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN-A mailboxes */

   ECANB       : origin = 0x006200, length = 0x000040     /* eCAN-B control and status registers */ 
   ECANB_LAM   : origin = 0x006240, length = 0x000040     /* eCAN-B local acceptance masks */
   ECANB_MOTS  : origin = 0x006280, length = 0x000040     /* eCAN-B message object time stamps */
   ECANB_MOTO  : origin = 0x0062C0, length = 0x000040     /* eCAN-B object time-out registers */
   ECANB_MBOX  : origin = 0x006300, length = 0x000100     /* eCAN-B mailboxes */

//   EPWM1       : origin = 0x006800, length = 0x000022     /* Enhanced PWM 1 registers */
//   EPWM2       : origin = 0x006840, length = 0x000022     /* Enhanced PWM 2 registers */
//   EPWM3       : origin = 0x006880, length = 0x000022     /* Enhanced PWM 3 registers */
//   EPWM4       : origin = 0x0068C0, length = 0x000022     /* Enhanced PWM 4 registers */
//   EPWM5       : origin = 0x006900, length = 0x000022     /* Enhanced PWM 5 registers */
//   EPWM6       : origin = 0x006940, length = 0x000022     /* Enhanced PWM 6 registers */

   EPWM1       : origin = 0x005800, length = 0x000022     /* Enhanced PWM 1 registers */
   EPWM2       : origin = 0x005840, length = 0x000022     /* Enhanced PWM 2 registers */
   EPWM3       : origin = 0x005880, length = 0x000022     /* Enhanced PWM 3 registers */
   EPWM4       : origin = 0x0058C0, length = 0x000022     /* Enhanced PWM 4 registers */
   EPWM5       : origin = 0x005900, length = 0x000022     /* Enhanced PWM 5 registers */
   EPWM6       : origin = 0x005940, length = 0x000022     /* Enhanced PWM 6 registers */


   ECAP1       : origin = 0x006A00, length = 0x000020     /* Enhanced Capture 1 registers */
   ECAP2       : origin = 0x006A20, length = 0x000020     /* Enhanced Capture 2 registers */
   ECAP3       : origin = 0x006A40, length = 0x000020     /* Enhanced Capture 3 registers */
   ECAP4       : origin = 0x006A60, length = 0x000020     /* Enhanced Capture 4 registers */         
   ECAP5       : origin = 0x006A80, length = 0x000020     /* Enhanced Capture 5 registers */         
   ECAP6       : origin = 0x006AA0, length = 0x000020     /* Enhanced Capture 6 registers */         
 
   EQEP1       : origin = 0x006B00, length = 0x000040     /* Enhanced QEP 1 registers */
   EQEP2       : origin = 0x006B40, length = 0x000040     /* Enhanced QEP 2 registers */   

   GPIOCTRL    : origin = 0x006F80, length = 0x000040     /* GPIO control registers */
   GPIODAT     : origin = 0x006FC0, length = 0x000020     /* GPIO data registers */
   GPIOINT     : origin = 0x006FE0, length = 0x000020     /* GPIO interrupt/LPM registers */
                 
   SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
   SPIA        : origin = 0x007040, length = 0x000010     /* SPI-A registers */
   SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
   XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */

   ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */

   SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */

   SCIC        : origin = 0x007770, length = 0x000010     /* SCI-C registers */
   
   I2CA        : origin = 0x007900, length = 0x000040     /* I2C-A registers */
   
   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */

   PARTID      : origin = 0x380090, length = 0x000001     /* Part ID register location */
}

 
SECTIONS
{
   PieVectTableFile : > PIE_VECT,   PAGE = 1

/*** Peripheral Frame 0 Register Structures ***/
   DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
   FlashRegsFile     : > FLASH_REGS,  PAGE = 1
   CsmRegsFile       : > CSM,         PAGE = 1
   AdcMirrorFile     : > ADC_MIRROR,  PAGE = 1 
   XintfRegsFile     : > XINTF,       PAGE = 1
   CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1
   CpuTimer1RegsFile : > CPU_TIMER1,  PAGE = 1
   CpuTimer2RegsFile : > CPU_TIMER2,  PAGE = 1  
   PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1     
   DmaRegsFile       : > DMA,         PAGE = 1 

/*** Peripheral Frame 3 Register Structures ***/
   McbspaRegsFile    : > MCBSPA,      PAGE = 1
   McbspbRegsFile    : > MCBSPB,      PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/
   ECanaRegsFile     : > ECANA,       PAGE = 1
   ECanaLAMRegsFile  : > ECANA_LAM    PAGE = 1   
   ECanaMboxesFile   : > ECANA_MBOX   PAGE = 1
   ECanaMOTSRegsFile : > ECANA_MOTS   PAGE = 1
   ECanaMOTORegsFile : > ECANA_MOTO   PAGE = 1
   
   ECanbRegsFile     : > ECANB,       PAGE = 1
   ECanbLAMRegsFile  : > ECANB_LAM    PAGE = 1   
   ECanbMboxesFile   : > ECANB_MBOX   PAGE = 1
   ECanbMOTSRegsFile : > ECANB_MOTS   PAGE = 1
   ECanbMOTORegsFile : > ECANB_MOTO   PAGE = 1
   
   EPwm1RegsFile     : > EPWM1        PAGE = 1   
   EPwm2RegsFile     : > EPWM2        PAGE = 1   
   EPwm3RegsFile     : > EPWM3        PAGE = 1   
   EPwm4RegsFile     : > EPWM4        PAGE = 1   
   EPwm5RegsFile     : > EPWM5        PAGE = 1   
   EPwm6RegsFile     : > EPWM6        PAGE = 1
   
   ECap1RegsFile     : > ECAP1        PAGE = 1   
   ECap2RegsFile     : > ECAP2        PAGE = 1   
   ECap3RegsFile     : > ECAP3        PAGE = 1   
   ECap4RegsFile     : > ECAP4        PAGE = 1
   ECap5RegsFile     : > ECAP5        PAGE = 1   
   ECap6RegsFile     : > ECAP6        PAGE = 1

   EQep1RegsFile     : > EQEP1        PAGE = 1   
   EQep2RegsFile     : > EQEP2        PAGE = 1               

   GpioCtrlRegsFile  : > GPIOCTRL     PAGE = 1
   GpioDataRegsFile  : > GPIODAT      PAGE = 1
   GpioIntRegsFile   : > GPIOINT      PAGE = 1
   
/*** Peripheral Frame 2 Register Structures ***/
   SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
   SpiaRegsFile      : > SPIA,        PAGE = 1
   SciaRegsFile      : > SCIA,        PAGE = 1
   XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
   AdcRegsFile       : > ADC,         PAGE = 1
   ScibRegsFile      : > SCIB,        PAGE = 1
   ScicRegsFile      : > SCIC,        PAGE = 1
   I2caRegsFile      : > I2CA,        PAGE = 1
              
/*** Code Security Module Register Structures ***/
   CsmPwlFile        : > CSM_PWL,     PAGE = 1

/*** Device Part ID Register Structures ***/
   PartIdRegsFile    : > PARTID,      PAGE = 1

}


/*
//===========================================================================
// End of file.
//===========================================================================
*/

And the example that works

/*
// TI File $Revision: /main/10 $
// Checkin $Date: July 9, 2008   13:43:56 $
//###########################################################################
//
// FILE:	F28335.cmd
//
// TITLE:	Linker Command File For F28335 Device
//
//###########################################################################
// $TI Release: $
// $Release Date: $
// $Copyright:
// Copyright (C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\headers\cmd
//   
// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2833x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP2833x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F28335  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

    Notes: 
          Memory blocks on F28335 are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.  
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program 
          and/or data. 
          
          L0/L1/L2 and L3 memory blocks are mirrored - that is
          they can be accessed in high memory or low memory.
          For simplicity only one instance is used in this
          linker file. 
          
          Contiguous SARAM memory blocks can be combined 
          if required to create a larger memory block. 
 */


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   ZONE0       : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
   RAML2       : origin = 0x00A000, length = 0x001000     /* on-chip RAM block L2 */
   RAML3       : origin = 0x00B000, length = 0x001000     /* on-chip RAM block L3 */
   ZONE6       : origin = 0x0100000, length = 0x100000    /* XINTF zone 6 */ 
   ZONE7A      : origin = 0x0200000, length = 0x00FC00    /* XINTF zone 7 - program space */ 
   FLASHH      : origin = 0x300000, length = 0x008000     /* on-chip FLASH */
   FLASHG      : origin = 0x308000, length = 0x008000     /* on-chip FLASH */
   FLASHF      : origin = 0x310000, length = 0x008000     /* on-chip FLASH */
   FLASHE      : origin = 0x318000, length = 0x008000     /* on-chip FLASH */
   FLASHD      : origin = 0x320000, length = 0x008000     /* on-chip FLASH */
   FLASHC      : origin = 0x328000, length = 0x008000     /* on-chip FLASH */
   FLASHA      : origin = 0x338000, length = 0x007F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   OTP         : origin = 0x380400, length = 0x000400     /* on-chip OTP */
   ADC_CAL     : origin = 0x380080, length = 0x000009     /* ADC_cal function in Reserved memory */
   
   IQTABLES    : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
   FPUTABLES   : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */        
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   
   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAML4       : origin = 0x00C000, length = 0x001000     /* on-chip RAM block L1 */
   RAML5       : origin = 0x00D000, length = 0x001000     /* on-chip RAM block L1 */
   RAML6       : origin = 0x00E000, length = 0x001000     /* on-chip RAM block L1 */
   RAML7       : origin = 0x00F000, length = 0x001000     /* on-chip RAM block L1 */
   ZONE7B      : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
   FLASHB      : origin = 0x330000, length = 0x008000     /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHA      PAGE = 0
   .pinit              : > FLASHA,     PAGE = 0
   .text               : > FLASHA      PAGE = 0
   codestart           : > BEGIN       PAGE = 0
#ifdef __TI_COMPILER_VERSION__
    #if __TI_COMPILER_VERSION__ >= 15009000
        .TI.ramfunc : {} LOAD = FLASHD,
                         RUN = RAML0,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         PAGE = 0
    #else
        ramfuncs       : LOAD = FLASHD, 
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         PAGE = 0
    #endif
#endif

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1       PAGE = 1
   .ebss               : > RAML4       PAGE = 1
   .esysmem            : > RAMM1       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0      

   /* Allocate IQ math areas: */
   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
   
   /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the 
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
   {
   
              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
   
   }
   */
   
   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
         
   /* Allocate DMA-accessible RAM sections: */
   DMARAML4         : > RAML4,     PAGE = 1
   DMARAML5         : > RAML5,     PAGE = 1
   DMARAML6         : > RAML6,     PAGE = 1
   DMARAML7         : > RAML7,     PAGE = 1
   
   /* Allocate 0x400 of XINTF Zone 7 to storing data */
   ZONE7DATA        : > ZONE7B,    PAGE = 1

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
   
   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

/*
// TI 文件$Revision：/main/10 $
//签入$日期：2008年7月9日13:43:56 $
//########################################################################出################################出
//
//文件：F28335.cmd
//
//标题：F28335器件的连接器命令文件
//
//########################################################################出################################出
//$TI 版本：$
//$Release Date：$
//$Copyright：
//版权所有(C) 2009-2023 Texas Instruments Incorporated - http://www.ti.com/
//
//以源代码和二进制形式重新分发和使用，无论有无
//修改，前提是满足以下条件
//已满足：
//
//重新分发源代码必须保留以上版权
//通知，此条件列表和下述免责声明。
//
//以二进制形式重新分发必须复制上述版权
//通知，此条件列表和以下免责声明(位于
///文件和/或其他材料
//分布。
//
// TI 公司名称或公司名称
//其贡献者可用于认可或推广派生的产品。
//未经事先书面许可从本软件获得。
//
//此软件由版权持有者和贡献者提供
//"按原样"和任何明示或暗示的保证、包括但不限于
//仅限于对适销性和适用性的暗示保证
//不考虑特定目的。在任何情况下、版权均不得
//所有者或贡献者对任何直接、间接、偶然、
//特殊、示例或后果性损害(包括但不包括
//仅限于采购替代货物或服务；不能使用、
///数据或利润；或业务中断)
//责任理论,无论是在合同,严格的责任,或侵权
//(包括疏忽或其他)以任何方式产生的使用
//本软件，即使已被告知此类损坏的可能性。
//$
//########################################################################出################################出
*/

/*========================================
//对于 Code Composer Studio V2.2及更高版本
//-------------------------------------------------------
//除了该存储器连接器命令文件，
//将头连接器命令文件直接添加到项目中。
//需要使用头连接器命令文件来链接
//外设结构设置到内部的正确位置
//存储器映射。
//
//头文件位于 \标题\cmd
//
//对于 BIOS 应用程序，添加：DSP2833x_Headers_BIOS.cmd
//对于非 BIOS 应用程序，添加：DSP2833x_Headers_nonBIOS.cmd
================================ */

/*========================================
//对于 V2.2之前的 Code Composer Studio
//-------------------------------------------------------
// 1)使用以下-l 语句之一来包含
//项目中的头连接器命令文件。头文件链接器
//文件需要将外设结构链接到正确的
//存储器映射中的位置*/

/*取消注释此行、以便仅包含非 BIOS 应用程序的文件*/
/*-l DSP2833x_Headers_nonBIOS.cmd */

/*取消注释此行、以便仅包含 BIOS 应用程序的文件*/
/*-l DSP2833x_Headers_BIOS.cmd */

/* 2)在项目中将路径添加到 \headers\cmd 添加到
项目->构建选项、链接器选项卡下的库搜索路径、
库搜索路径(-i)。
/*=================================================================================== */

/*定义 F28335的内存块起始/长度
第0页将用于组织程序段
第1页将用于组织数据段

注：
F28335上的内存块是统一的(即
物理存储器)。
存储器区域的头文件不应
为 PAGE 0和 PAGE 1定义了该值。
这样做会导致程序损坏、
和/或数据。

L0/L1/L2和 L3存储器块被镜像-即
它们可以在高内存或低内存中进行访问。
为简单起见、此示例中仅使用一个实例
链接器文件。

连续 SARAM 存储器块可以组合
创建更大的存储块。
*/

内存
{
第0页：/*程序存储器*/
/*存储器(RAM/FLASH/OTP)块可以移动到页1进行数据分配*/

ZONE0：origin = 0x004000、length = 0x001000 /* XINTF zone 0 */
RAML0：origin = 0x008000、length = 0x001000 /*片上 RAM 块 L0 */
RAML1：origin = 0x009000、length = 0x001000 /*片上 RAM 块 L1 */
RAML2：origin = 0x00A000，length = 0x001000 /*片上 RAM 块 L2 */
RAML3：origin = 0x00B000、length = 0x001000 /*片上 RAM 块 L3 */
ZONE6：origin = 0x0100000、length = 0x100000 /* XINTF zone 6 */
ZONE7A：origin = 0x0200000，length = 0x00FC00 /* XINTF zone 7 - program space */
FLASHH：origin = 0x300000、length = 0x008000 /*片上闪存*/
FLASHG：origin = 0x308000，length = 0x008000 /*片上闪存*/
FLASHF：origin = 0x310000，length = 0x008000 /*片上闪存*/
FLASHE：origin = 0x318000，length = 0x008000 /*片上闪存*/
FLASHD : origin = 0x320000 , length = 0x008000 /*片上闪存*/
FLASHC：origin = 0x328000，length = 0x008000 /*片上闪存*/
FLASHA : origin = 0x338000, length = 0x007F80 /*片上闪存*/
CSM_RSVD：origin = 0x33FF80、length = 0x000076 /*部分 FLASHA。当 CSM 正在使用时、全为0x0000编程。 */
begin：origin = 0x33FFF6、length = 0x000002 /*部分 FLASHA。用于"引导至闪存"引导加载程序模式。 */
CSM_PWL：origin = 0x33FFF8，length = 0x000008 /*部分 FLASHA。 FLASHA 中的 CSM 密码位置*/
OTP：origin = 0x380400、length = 0x000400 /*片上 OTP */
ADC_CAL：origin = 0x380080、length = 0x000009 /*保留存储器中的 ADC_cal 函数*/

IQTABLES : origin = 0x3FE000 , length = 0x000b50 /*在 Boot ROM 中的 IQMath 表*/
IQTABLES2：origin = 0x3FEB50，length = 0x00008c /*引导 ROM 中的 IQMath 表*/
FPUBLES：origin = 0x3FEBDC，length = 0x0006A0 /*引导 ROM 中的 FPU 表*/
ROM：origin = 0x3FF27C，length = 0x000D44 /* Boot ROM */
复位：origin = 0x3FFFC0、length = 0x000002 /* part of boot ROM */
vectors : origin = 0x3FFFc2, length = 0x00003E /* part of boot ROM */

第1页：/*数据存储器*/
/*存储器(RAM/FLASH/OTP)块可以移动到 PAGE0进行程序分配*/
/*寄存器仍保留在页1上*/

BOOT_RSVD：origin = 0x000000，length = 0x000050 /* M0的一部分，引导 ROM 将此用于堆栈*/
RAMM0：origin = 0x000050，length = 0x0003B0 /*片上 RAM 块 M0 */
RAMM1：origin = 0x000400，length = 0x000400 /*片上 RAM 块 M1 */
RAML4：origin = 0x00C000、length = 0x001000 /*片上 RAM 块 L1 */
RAML5：origin = 0x00D000、length = 0x001000 /*片上 RAM 块 L1 */
RAML6：origin = 0x00E000、length = 0x001000 /*片上 RAM 块 L1 */
RAML7：origin = 0x00F000、length = 0x001000 /*片上 RAM 块 L1 */
ZONE7B：origin = 0x20FC00，length = 0x000400 /* XINTF zone 7 - data space */
FLASHB：origin = 0x330000，length = 0x008000 /*片上闪存*/
｝

/*将段分配给内存块。
注：
DSP28_CodeStartBranch.asm 中的 codestart 用户定义段用于重定向代码
引导至闪存时执行
ramfuncs 的用户定义的部分、用于存储将从闪存复制到 RAM 中的函数
*/

部分
{

/*分配计划领域:*/
.cinit :> FLASHA 页面= 0
.pinit :> FLASHA,页面= 0
.text：> FLASHA page = 0
codestart :>开始页面= 0
#ifdef __TI_Compiler_version__
#if __TI_Compiler_version__>= 15009000
.TI.ramfunc：｛｝load = FLASHD、
RUN = RAML0、
Load_start (_RamfuncsLoadStart)、
Load_End (_RamfuncsLoadEnd)、
RUN_START (_RamfuncsRunStart)、
Load_Size (_RamfuncsLoadSize)、
PAGE = 0
#else
ramfuncs : load=FLASHD,
RUN = RAML0、
Load_start (_RamfuncsLoadStart)、
Load_End (_RamfuncsLoadEnd)、
RUN_START (_RamfuncsRunStart)、
Load_Size (_RamfuncsLoadSize)、
PAGE = 0
#endif
#endif

csmpasswds :> csm_PWL page = 0
csm_rsvd :> csm_rsVD page = 0

/*分配未初始化的数据段：*/
.stack：> RAMM1页= 1
.ebss：> RAML4 page = 1
.esysmem :> RAMM1页面= 1

/*初始化段进入闪存*/
/*要使 SDFlash 对这些单元进行编程，它们必须被分配到 PAGE 0 */
econst：> FLASHA 页面= 0
.switch：> FLASHA PAGE = 0

/*分配 IQ 数学领域:*/
IQMath :> FLASHC page = 0 /*数学代码*/
IQmathTables :> IQTABLES , PAGE = 0, TYPE = NOLOAD

/*如果调用 IQNexp()或 IQexp()，请取消注释以下部分
库中的 Iqmath.lib 函数构建库、从而利用
引导 ROM 中的相关 IQMath 表(这样可以节省空间和引导 ROM
1个等待状态)。如果未取消注释该段、则 IQmathTables2
将加载到其他存储器(SARAM、闪存等)中、并将执行
为 up 空间、但等待状态为0是可行的。
*/
/*
IQmathTables2：>IQTABLES2、PAGE = 0、TYPE = NOLOAD
{

IQmath.lib (IQmathTablesRam)

｝
*/

FPUmathTables :> FPUTABLES , PAGE = 0, TYPE = NoLoad

/*分配 DMA 可访问的 RAM 段：*/
DMARAML4 :> RAML4, page = 1
DMARAML5 :> RAML5 ,页面= 1
DMARAML6 :> RAML6 ,页面= 1
DMARAML7 :> RAML7, page = 1

/*分配0x400的 XINTF 区域7来存储数据*/
ZONE7DATA :> ZONE7B, PAGE = 1

/*.reset 是编译器使用的标准段。它包含*/
/* C 代码的_c_int00起始地址。 /*
/*使用引导 ROM 时、此段和 CPU 矢量*/
不需要/*表。因此、此处将默认类型设置为*/
/* DSECT */
.reset：> RESET、PAGE = 0、TYPE = DSECT
引导程序:>引导程序页面= 0，类型= DSECT

/*分配 ADC_cal 函数(工厂预编程到 TI 保留的存储器中)*/
.adc_cal：load = adc_CAL、page = 0、type =空载

｝

/*
//========================================
//文件结尾。
//========================================
*/

Thank you very much

Mattéo

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

您好！

再想一想、主要的区别可能是我有一个引导加载程序、而示例没有。

可能只是我没有按照预期的方式加载引导加载程序。

Matt é o

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

Matthew 您好！

抱歉、增加了话题。

此致

Matt é o

0 admin 2 年多前

TI__Guru**** 2591340 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

Matt é o,

很抱歉耽误我的回复。

根据您对引导加载程序的看法、当您独立运行时、您是计划直接引导到闪存、还是始终引导到外部加载程序？我一直提供的示例一直在上下文中、至少在本示例中、您将引导到闪存、并按此方式配置引导引脚。

你能够从下面的引导表中确认你正在使用哪一个配置：我一直认为跳转至闪存(顶部的一个)。

C2000™︎ 微控制器（参考译文帖）

C2000™︎ 微控制器（参考译文帖）(Read Only)

[参考译文] TMS320F28335：CPU 在断电/接通后不运行、但是在闪存加载后运行