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器件型号：TMS320F28388D 您好、专家
我在创建包括具有128位对齐地址的存储器块在内的二进制映像时遇到问题。
我正在使用十六进制实用程序来获取具有引导表的二进制格式映像、如下所示。
问题在于、在二进制格式图像中有一个未进行128位对齐的块、如下所示。
使用闪存 API 将固件更新到闪存时、会出现一些问题、例如计算 ECC。
目标地址0x0009801E 不是128位对齐的地址。
下面是我将使用的链接命令脚本。 我曾尝试将其设置为与 align (8)对齐128位、但不确定我错过了哪个点。
关于这个问题、请给我一些建议。
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
MEMORY
{
HWBIST : origin = 0x000000, length = 0x000020
/* BEGIN is used for the "boot to Flash" bootloader mode */
RAMM0 : origin = 0x0001B1, length = 0x00024F
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
RAMD0 : origin = 0x00C000, length = 0x000800
RAMD1 : origin = 0x00C800, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS23 : origin = 0x009000, length = 0x001000
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMLS6TO7 : origin = 0x00B000, length = 0x001000
RAMGS0 : origin = 0x00D000, length = 0x001000
RAMGS1TO11 : origin = 0x00E000, length = 0x00AFF0
RAMCOPY : origin = 0x018FF0, length = 0x000010
/* Flash sectors */
BEGIN : origin = 0x088000, length = 0x000002
VERSION : origin = 0x088008, length = 0x000008
FLASH4TO9 : origin = 0x088010, length = 0x02FFF0
FLASH10 : origin = 0x0B8000, length = 0x002000
FLASH11 : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASH12 : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASH13 : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x0007F0
CPU2TOCPU1RAM_WD : origin = 0x03B7F0, length = 0x000010
CPUTOCMRAM : origin = 0x039000, length = 0x0007F0
CPUTOCM_PS : origin = 0x0397F0, length = 0x000010
CMTOCPURAM : origin = 0x038000, length = 0x0007E8
CMTOCPU_WD : origin = 0x0387E8, length = 0x000008
CMTOCPU_PS : origin = 0x0387F0, length = 0x000010
CLATOCPURAM : origin = 0x001480, length = 0x000080
CPUTOCLARAM : origin = 0x001500, length = 0x000080
CLATODMARAM : origin = 0x001680, length = 0x000080
DMATOCLARAM : origin = 0x001700, length = 0x000080
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
EMIF1_CS0n : origin = 0x80000000, length = 0x10000000
EMIF1_CS2n : origin = 0x00100000, length = 0x00100000
EMIF1_CS0_CS2n : origin = 0x00200000, length = 0x00100000
EMIF1_CS3n : origin = 0x00300000, length = 0x00080000
EMIF1_CS4n : origin = 0x00380000, length = 0x00060000
EMIF2_CS0n : origin = 0x90000000, length = 0x10000000
EMIF2_CS2n : origin = 0x00002000, length = 0x00001000
}
SECTIONS
{
codestart : > BEGIN, ALIGN(8)
.text : > FLASH4TO9, ALIGN(8)
.cinit : > FLASH4TO9, ALIGN(8)
.switch : > FLASH10, ALIGN(8)
.reset : > RESET, TYPE = DSECT /* not used, */
.TI.crctab : > FLASH13, ALIGN(8)
/* HWBIST reset context restore code must be placed at 0x0000 */
hwbist : LOAD = FLASH4TO9,
RUN = HWBIST,
LOAD_START(HwbistLoadStart),
LOAD_SIZE(HwbistLoadSize),
RUN_START(HwbistRunStart),
PAGE = 0, ALIGN(8)
/* Must be placed lower than a 16-bit memory address */
hwbiststack : > RAMM0
.stack : > RAMLS6TO7
.init_array : > FLASH4TO9, ALIGN(8)
.bss : >> RAMGS1TO11
.bss:output : > RAMLS4
.bss:cio : > RAMLS4
.data : >> RAMLS4|RAMLS5
.sysmem : > RAMLS5
/* Initalized sections go in Flash */
.const : > FLASH4TO9, ALIGN(8)
ramgs0 : > RAMGS1TO11, type=NOINIT
ramcopy : > RAMCOPY, type=NOINIT
MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1_Wd : > CPU2TOCPU1RAM_WD, type=NOINIT
MSGRAM_CPU_TO_CM : > CPUTOCMRAM, type=NOINIT
MSGRAM_CM_TO_CPU : > CMTOCPURAM, type=NOINIT
MSGRAM_CPUTOCM_PS : > CPUTOCM_PS, type=NOINIT
MSGRAM_CMTOCPU_PS : > CMTOCPU_PS, type=NOINIT
MSGRAM_CMTOCPU_WD : > CMTOCPU_WD, type=NOINIT
MSGRAM_CLA_TO_CPU : > CLATOCPURAM, type=NOINIT
MSGRAM_CPU_TO_CLA : > CPUTOCLARAM, type=NOINIT
MSGRAM_CLA_TO_DMA : > CLATODMARAM, type=NOINIT
MSGRAM_DMA_TO_CLA : > DMATOCLARAM, type=NOINIT
/* CLA specific sections */
Cla1Prog : LOAD = FLASH11,
RUN = RAMLS23,
LOAD_START(Cla1funcsLoadStart),
LOAD_END(Cla1funcsLoadEnd),
RUN_START(Cla1funcsRunStart),
LOAD_SIZE(Cla1funcsLoadSize),
ALIGN(8)
CLADataLS0 : > RAMLS0
CLADataLS1 : > RAMLS1
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > RAMLS1, ALIGN(8)
.scratchpad : > RAMLS1
.bss_cla : > RAMLS1
.const_cla : LOAD = FLASH11,
RUN = RAMLS1,
RUN_START(Cla1ConstRunStart),
LOAD_START(Cla1ConstLoadStart),
LOAD_SIZE(Cla1ConstLoadSize),
ALIGN(8)
DataBufferSection : > RAMM1, ALIGN(8)
VersionImageSection : > RAMGS1TO11, ALIGN(8)
PrintBufferSection : > RAMGS1TO11, ALIGN(8)
SafetyParameterSection : > RAMGS1TO11, ALIGN(8)
.TI.ramfunc : {
-l F2838x_C28x_FlashAPI.lib
}
LOAD = FLASH4TO9,
RUN = RAMGS1TO11,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
ALIGN(8)
.sdramfunc : {} LOAD = FLASH4TO9,
RUN = RAMGS1TO11,
LOAD_START(XintffuncsLoadStart),
LOAD_END(XintffuncsLoadEnd),
RUN_START(XintffuncsRunStart),
ALIGN(8)
emif_cs0_nonfar : > EMIF1_CS0_CS2n
.farbss : > EMIF1_CS0n
.farconst : > EMIF1_CS0n
.em1_cs0 : > EMIF1_CS0n
.em1_cs2 : > EMIF1_CS2n | EMIF1_CS0_CS2n
.em1_cs3 : > EMIF1_CS3n
.em1_cs4 : > EMIF1_CS4n
.em2_cs0 : > EMIF2_CS0n
.em2_cs2 : > EMIF2_CS2n
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
