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https://e2e.ti.com/support/clock-timing-group/clock-and-timing/f/clock-timing-forum/1418768/cdcvf25081-fbin-connection-destination-in-pll-bypass-mode
工具与软件：
你(们)好 在 PLL 旁路模式下使用 FBIN (16pin)应该怎么做？ 此致、
尊敬的 Morisato： 引脚为 NC。
此致、
Vicente
亲爱的 Vicente
感谢您的回答。
Morisato
