请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。
https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1528383/dp83826e-changes
部件号：DP83826E主题中讨论的其他器件： TMDS64EVM、 DP83869
工具/软件：
尊敬的专家：
我当前正在尝试让 DP83826E 在采用 AM642 的定制电路板上与 ICSSG 配合使用。
我 根据 ti-linux-kernel 存储库中的 10.01.10 版构建了内核。
我之前 在评估板 (TMDS64EVM) 上以 MII 模式测试了两个接口、使用相同的构建内核没有任何问题。
该 评估板 使用两个 DP83869 PHY、因此我假设设备树和配置中的以下自适应就足够了。
配置更改：
CONFIG_DP83822_PHY=m
板级器件树更改：
// ...
/ {
compatible = "ti,am642-custom", "ti,am642";
model = "Texas Instruments AM642 Custom";
chosen {
stdout-path = &main_uart0;
};
aliases {
serial0 = &mcu_uart0;
serial1 = &main_uart1;
serial2 = &main_uart0;
serial3 = &main_uart3;
i2c0 = &main_i2c0;
i2c1 = &main_i2c1;
mmc0 = &sdhci0;
ethernet0 = &icssg1_emac0;
};
// ...
icssg1_eth: icssg1-eth {
compatible = "ti,am642-icssg-prueth";
pinctrl-names = "default";
//pinctrl-0 = <&icssg1_rgmii1_pins_default>;
pinctrl-0 = <&icssg1_mii1_pins_default>;
sram = <&oc_sram>;
ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
"ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
"ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
"ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
"ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";
ti,pruss-gp-mux-sel = <2>, /* MII mode */
<2>,
<2>,
<2>, /* MII mode */
<2>,
<2>;
ti,mii-g-rt = <&icssg1_mii_g_rt>;
ti,mii-rt = <&icssg1_mii_rt>;
ti,iep = <&icssg1_iep0>, <&icssg1_iep1>;
ti,pa-stats = <&icssg1_pa_stats>;
interrupt-parent = <&icssg1_intc>;
interrupts = <24 0 2>, <25 1 3>;
interrupt-names = "tx_ts0", "tx_ts1";
dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
<&main_pktdma 0xc201 15>, /* egress slice 0 */
<&main_pktdma 0xc202 15>, /* egress slice 0 */
<&main_pktdma 0xc203 15>, /* egress slice 0 */
<&main_pktdma 0xc204 15>, /* egress slice 1 */
<&main_pktdma 0xc205 15>, /* egress slice 1 */
<&main_pktdma 0xc206 15>, /* egress slice 1 */
<&main_pktdma 0xc207 15>, /* egress slice 1 */
<&main_pktdma 0x4200 15>, /* ingress slice 0 */
<&main_pktdma 0x4201 15>; /* ingress slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
icssg1_emac0: port@0 {
reg = <0>;
phy-handle = <&icssg1_phy1>;
//phy-mode = "rgmii-id";
phy-mode = "mii";
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
icssg1_emac1: port@1 {
reg = <1>;
//phy-handle = <&icssg1_phy2>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
status = "disabled";
};
};
};
};
&main_pmx0 {
icssg1_mdio1_pins_default: icssg1-mdio1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) /* (Y6) PRG1_MDIO0_MDC */
AM64X_IOPAD(0x0158, PIN_INPUT, 0) /* (AA6) PRG1_MDIO0_MDIO */
>;
};
icssg1_mii1_pins_default: icssg1-mii1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x00f8, PIN_INPUT, 1) /* (V9) PRG1_PRU0_GPO16.PR1_MII_MT0_CLK */
AM64X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (Y9) PRG1_PRU0_GPO15.PR1_MII0_TXEN */
AM64X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AA9) PRG1_PRU0_GPO14.PR1_MII0_TXD3 */
AM64X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (W9) PRG1_PRU0_GPO13.PR1_MII0_TXD2 */
AM64X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (U9) PRG1_PRU0_GPO12.PR1_MII0_TXD1 */
AM64X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA8) PRG1_PRU0_GPO11.PR1_MII0_TXD0 */
AM64X_IOPAD(0x00c8, PIN_INPUT, 1) /* (Y8) PRG1_PRU0_GPO4.PR1_MII0_RXDV */
AM64X_IOPAD(0x00d0, PIN_INPUT, 1) /* (AA7) PRG1_PRU0_GPO6.PR1_MII_MR0_CLK */
AM64X_IOPAD(0x00c4, PIN_INPUT, 1) /* (V8) PRG1_PRU0_GPO3.PR1_MII0_RXD3 */
AM64X_IOPAD(0x00c0, PIN_INPUT, 1) /* (W8) PRG1_PRU0_GPO2.PR1_MII0_RXD2 */
AM64X_IOPAD(0x00cc, PIN_INPUT, 1) /* (V13) PRG1_PRU0_GPO5.PR1_MII0_RXER */
AM64X_IOPAD(0x00bc, PIN_INPUT, 1) /* (U8) PRG1_PRU0_GPO1.PR1_MII0_RXD1 */
AM64X_IOPAD(0x00b8, PIN_INPUT, 1) /* (Y7) PRG1_PRU0_GPO0.PR1_MII0_RXD0 */
AM64X_IOPAD(0x00d8, PIN_INPUT, 1) /* (W13) PRG1_PRU0_GPO8.PR1_MII0_RXLINK */
>;
};
// ...
};
&cpsw3g {
status = "disabled";
};
// ...
&icssg1_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&icssg1_mdio1_pins_default>;
icssg1_phy1: ethernet-phy@1f {
reg = <0x1f>;
tx-internal-delay-ps = <250>;
rx-internal-delay-ps = <2000>;
};
};
通过调整、我始终会从 MDIO 驱动程序得到以下误差：
[ 7.091610] davinci_mdio 300b2400.mdio: Configuring MDIO in manual mode [ 7.365821] davinci_mdio 300b2400.mdio: davinci mdio revision 1.7, bus freq 1000000 [ 7.396256] mdio_bus 300b2400.mdio: MDIO device at address 31 is missing. ... [ 10.239699] icssg-prueth icssg1-eth: port 1: using random MAC addr: 82:6c:f2:4a:06:1a [ 10.591384] icssg-prueth icssg1-eth: couldn't connect to phy ethernet-phy@1 [ 10.600669] icssg-prueth icssg1-eth: can't connect to MII0 PHY, error --19
我还检查了驱动程序内的 PHY ID、并确认定义了以下两个 ID：
#define DP83826C_PHY_ID 0x2000a130 #define DP83826NC_PHY_ID 0x2000a110
添加 PHY ID 0x2000a131 时收到相同的错误消息、我认为这 对于我的情况应该是正确的错误消息。
向 Ethernet-phy 节点添加兼容项似乎首先起作用、但未检测到链路。
compatible = "ethernet-phy-id2000.a131", "ethernet-phy-ieee802.3-c22";
[ 7.452274] davinci_mdio 300b2400.mdio: Configuring MDIO in manual mode [ 7.533461] davinci_mdio 300b2400.mdio: davinci mdio revision 1.7, bus freq 1000000 [ 7.651433] davinci_mdio 300b2400.mdio: phy[2]: device 300b2400.mdio:1f, driver TI DP83826E [ 10.326676] TI DP83826E 300b2400.mdio:1f: attached PHY driver (mii_bus:phy_addr=300b2400.mdio:1f, irq=POLL) [ 10.193498] icssg-prueth icssg1-eth: port 1: using random MAC addr: ea:2e:14:59:20:d8 [ 10.349487] icssg-prueth icssg1-eth: TI PRU ethernet driver initialized: single EMAC mode
我对这个主题缺乏经验、不确定我应该寻找什么。
您能告诉我、DP83826E 是否可与 ICSSG 和 dp83822.c 驱动器配合使用？
如果是、您能看到我漏掉了什么吗？
