Other Parts Discussed in Thread: TDA4VM, DS90UB953-Q1, DS90UB960-Q1
器件型号: DS90UB953-Q1
主题中讨论的其他器件: TDA4VM、 DS90UB960-Q1
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某些电路板在低至–35°C 的电压下正常运行
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一些电路板无法锁定在–35°C
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Other Parts Discussed in Thread: TDA4VM, DS90UB953-Q1, DS90UB960-Q1
器件型号: DS90UB953-Q1
主题中讨论的其他器件: TDA4VM、 DS90UB960-Q1
代表 venkateshraja p ,
感谢您的更新。
我们尚未执行温度斜坡初始化、因为在我们的设置中、我们将 driver/media/i2c/ds90ub953.c 用于串行器和 drivers/media/i2c/ds90ub960.c 解串器源代码。
从 ds90ub953 数据表中、我们可以看到 温度斜坡初始化的 7.3.1.1.1 代码示例。
您能否提供补丁文件以包含上述温度斜坡初始化 驱动程序/media/i2c/ds90ub953.c 和 驱动程序/media/i2c/ds90ub90.c?
尊敬的 Jeyaprakash:
我编写了代码片段、可以将其添加到源文件中以实施温度斜坡初始化代码。 很遗憾、我看不到这 2 个文件中包含初始化发生的顺序。 您能否分享用于进行初始化的代码? 这应该是来自 960 和 953 源文件的一系列函数调用、根据您的系统参数初始化每个器件。 看到此序列后、我可以添加用于温度斜坡初始化的函数调用。
添加到 ds90ub960.c:
static int ub960_rxport_get_temp_code_95x(struct ub960_data *priv,
unsigned int nport, u8 *temp_code_95x)
{
int ret;
u8 v;
ret = ub960_rxport_read(priv, nport, UB960_RR_SENSOR_STS_2, &v);
if (ret)
return ret;
*temp_code_95x = v;
return 0;
}
添加到 ds90ub953.c:
#define UB953_IND_TX_TEMP_RAMP_DYNAMIC_CFG 0x4b
#define UB953_IND_TX_TEMP_RAMP_STATIC_CFG 0x4c
static int ub953_temp_ramp_ext(struct ub953_data *priv,
u8 temp_code_95x)
{
int ret;
u8 vdac;
u8 vco_tweak;
int vdac_offset[8] = {-1, -1, 0, 0, 1, 1, 1, 3};
ret = ub953_read_ind(priv, UB953_IND_TARGET_FPD3_TX, UB953_IND_TX_TEMP_RAMP_DYNAMIC_CFG, &vdac);
if (ret)
return ret;
vdac = vdac | 0x20;
ret = ub953_read_ind(priv, UB953_IND_TARGET_FPD3_TX, UB953_IND_TX_TEMP_RAMP_STATIC_CFG, &vco_tweak);
if (ret)
return ret;
vco_tweak = (vco_tweak & 0x8f) | 0x70
ret = ub953_write_ind(priv, UB953_IND_TARGET_FPD3_TX, UB953_IND_TX_TEMP_RAMP_STATIC_CFG, vco_tweak);
if (ret)
return ret;
ret = ub953_write_ind(priv, UB953_IND_TARGET_FPD3_TX, UB953_IND_TX_TEMP_RAMP_DYNAMIC_CFG, vdac + vdac_offset[temp_code_95x]);
if (ret)
return ret;
ret = ub953_write(priv, UB953_REG_RESET_CTL, UB953_REG_RESET_CTL_DIGITAL_RESET_0);
if (ret)
return ret;
// add 20ms delay
return 0;
}
此致、
Lucas
您好、Lucas:
感谢您的信息。
目前我们没有单独的初始化代码。 我们仅 对序列发生器和解串器使用 ds90ub960.c 和 ds90ub953.c 源。
这两个驱动程序的探测器将从下面的设备树调用。
k3-j784s4-evm-fpdlink-iv-fusion.dtso:
// SPDX-License-Identifier: GPL-2.0-only OR MIT /* * DT Overlay for FPDLink IV UB9702 Deserializer on J784S4 EVM * www.ti.com/.../J7EXPA01EVM * * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; /plugin/; #include <dt-bindings/gpio/gpio.h> &{/} { clk_fusion_25M_fixed: fixed-clock-25M { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; }; &exp5 { p0-hog{ gpio-hog; gpios = <0 GPIO_ACTIVE_HIGH>; output-high; line-name = "CSI2_EXP_RSTZ"; }; }; &main_i2c5 { #address-cells = <1>; #size-cells = <0>; status = "okay"; deser@3d { compatible = "ti,ds90ub9702-q1"; reg = <0x3d>; clocks = <&clk_fusion_25M_fixed>; clock-names = "refclk"; i2c-alias-pool = <0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; deserializer_0_ports: ports { #address-cells = <1>; #size-cells = <0>; /* CSI-2 TX */ port@4 { reg = <4>; ds90ub970_0_csi_out: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; remote-endpoint = <&csi2_phy0>; }; }; }; deserializer_0_links: links { #address-cells = <1>; #size-cells = <0>; }; }; deser@30 { compatible = "ti,ds90ub9702-q1"; reg = <0x30>; clocks = <&clk_fusion_25M_fixed>; clock-names = "refclk"; i2c-alias-pool = <0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>; deserializer_1_ports: ports { #address-cells = <1>; #size-cells = <0>; /* CSI-2 TX */ port@4 { reg = <4>; ds90ub970_1_csi_out: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; remote-endpoint = <&csi2_phy1>; }; }; }; deserializer_1_links: links { #address-cells = <1>; #size-cells = <0>; }; }; deser@32 { compatible = "ti,ds90ub9702-q1"; reg = <0x32>; clocks = <&clk_fusion_25M_fixed>; clock-names = "refclk"; i2c-alias-pool = <0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f>; deserializer_2_ports: ports { #address-cells = <1>; #size-cells = <0>; /* CSI-2 TX */ port@4 { reg = <4>; ds90ub970_2_csi_out: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; remote-endpoint = <&csi2_phy2>; }; }; }; deserializer_2_links: links { #address-cells = <1>; #size-cells = <0>; }; }; }; &cdns_csi2rx0 { ports { #address-cells = <1>; #size-cells = <0>; csi0_port0: port@0 { reg = <0>; status = "okay"; csi2_phy0: endpoint { remote-endpoint = <&ds90ub970_0_csi_out>; clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; }; }; }; }; &cdns_csi2rx1 { ports { #address-cells = <1>; #size-cells = <0>; csi1_port0: port@0 { reg = <0>; status = "okay"; csi2_phy1: endpoint { remote-endpoint = <&ds90ub970_1_csi_out>; bus-type = <4>; /* CSI2 DPHY */ clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; }; }; }; }; &cdns_csi2rx2 { ports { #address-cells = <1>; #size-cells = <0>; csi2_port0: port@0 { reg = <0>; status = "okay"; csi2_phy2: endpoint { remote-endpoint = <&ds90ub970_2_csi_out>; bus-type = <4>; /* CSI2 DPHY */ clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; }; }; }; }; &ti_csi2rx0 { status = "okay"; }; &ti_csi2rx1 { status = "okay"; }; &ti_csi2rx2 { status = "okay"; }; &dphy0 { status = "okay"; }; &dphy1 { status = "okay"; }; &dphy2 { status = "okay"; };
k3-fpdlink-iv-fusion-ox08b40-cam-0-0.dtso:
/*
* OX08B40 E-con FPD-Link 4 Camera
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#define MCU_FW_FILE "ox08b40_cam_fw.hex"
&deserializer_0_ports {
#address-cells = <1>;
#size-cells = <0>;
/* FPDLink RX 0 */
port@0 {
reg = <0>;
ub9702_fpd4_1_in: endpoint {
remote-endpoint = <&ub971_1_out>;
};
};
};
&deserializer_0_links {
#address-cells = <1>;
#size-cells = <0>;
link@0 {
reg = <0>;
i2c-alias = <0x44>;
ti,cdr-mode = <1>;
ti,rx-mode = <3>;
serializer: serializer {
compatible = "ti,ds90ub971-q1";
gpio-controller;
#gpio-cells = <2>;
#clock-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ub971_1_in: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&sensor_1_out>;
};
};
port@1 {
reg = <1>;
ub971_1_out: endpoint {
remote-endpoint = <&ub9702_fpd4_1_in>;
};
};
};
i2c {
#address-cells = <1>;
#size-cells = <0>;
gpio_exp: expander-chip0@74 {
compatible = "ti,tca9539";
reg = <0x74>;
gpio-controller;
#gpio-cells = <2>;
};
ox08b40@43 {
compatible = "ti,ox08b40";
reg = <0x43>;
clocks = <&serializer>;
clock-names = "xvclk";
assigned-clocks = <&serializer>;
assigned-clock-rates = <24000000>;
mcu_fw_name = MCU_FW_FILE;
pwdn-gpios = <&gpio_exp 0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>;
camstrobe-gpios = <&serializer 0 GPIO_ACTIVE_HIGH>; // Need during FSYNC case
port {
sensor_1_out: endpoint {
remote-endpoint = <&ub971_1_in>;
};
};
};
};
};
};
};
再在这里添加一个点。 该端口 所有 RX 端口串行器锁定失败、 探头 不会调用 ds90ub953.c、因此我们无法执行 ub953_temp_RAMP_ext
提前感谢。
Jeyaprakash C K.
尊敬的 Jeyaprakash:
我仍然不清楚链接是如何在您的系统中初始化的。 尽管 dtso 文件共享了一些有关配置参数的信息、但我仍然不清楚如何从 C 源文件调用函数来初始化链接。 此外、我不清楚这里使用的是哪些 FPD-Link 器件。 您能帮助我更好地理解吗?
此致、
Lucas
您好、Lucas:
感谢您的注意,我已经添加了 最新版本的文件,让我给你一个正确版本的设备树,这与 POST 的上下文相匹配。
k3-j721e-sk-fpdlink-fusion.dtso:
// SPDX-License-Identifier: GPL-2.0 /* * DT Overlay for Fusion (FPD-Link III) board on J721E SK, * AM68 SK or AM69 SK. * svtronics.com/.../ * * Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/ */ /dts-v1/; /plugin/; #include <dt-bindings/gpio/gpio.h> &{/} { clk_fusion_25M_fixed: fixed-clock-25M { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; }; &cam0_i2c { #address-cells = <1>; #size-cells = <0>; deser@30 { compatible = "ti,ds90ub960-q1"; reg = <0x30>; clocks = <&clk_fusion_25M_fixed>; clock-names = "refclk"; i2c-alias-pool = <0x33 0x34 0x35 0x36 0x37 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; deserializer_0_ports: ports { #address-cells = <1>; #size-cells = <0>; /* CSI-2 TX*/ port@4 { reg = <4>; ds90ub960_0_csi_out: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; remote-endpoint = <&csi2_phy0>; }; }; }; deserializer_0_links: links { #address-cells = <1>; #size-cells = <0>; }; }; deser@36 { compatible = "ti,ds90ub960-q1"; reg = <0x36>; status = "disabled"; clocks = <&clk_fusion_25M_fixed>; clock-names = "refclk"; i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>; deserializer_1_ports: ports { #address-cells = <1>; #size-cells = <0>; /* CSI-2 TX*/ port@4 { reg = <4>; ds90ub960_1_csi_out: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; remote-endpoint = <&csi2_phy1>; }; }; }; deserializer_1_links: links { #address-cells = <1>; #size-cells = <0>; }; }; }; &cdns_csi2rx0 { ports { #address-cells = <1>; #size-cells = <0>; csi0_port0: port@0 { reg = <0>; status = "okay"; csi2_phy0: endpoint { remote-endpoint = <&ds90ub960_0_csi_out>; clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; }; }; }; }; &cdns_csi2rx1 { ports { #address-cells = <1>; #size-cells = <0>; csi1_port0: port@0 { reg = <0>; status = "okay"; csi2_phy1: endpoint { remote-endpoint = <&ds90ub960_1_csi_out>; bus-type = <4>; /* CSI2 DPHY */ clock-lanes = <0>; data-lanes = <1 2 3 4>; link-frequencies = /bits/ 64 <800000000>; }; }; }; }; &ti_csi2rx0 { status = "okay"; }; &dphy0 { status = "okay"; }; &ti_csi2rx1 { status = "okay"; }; &dphy1 { status = "okay"; };
Camera-support-device-tree
// SPDX-License-Identifier: GPL-2.0 /* * ISX031 FPD-Link 3 Camera Module * * Copyright (c) 2023 Texas Instruments Incorporated - http://www.ti.com/ */ /dts-v1/; /plugin/; #include <dt-bindings/gpio/gpio.h> #define SPI_BOOT_DATA_FILE "ISX031_STURDeCAM31_0.1.1.3.bin" #define MCU_FW_FILE "isx031_cam_fw_boowan_narrow.bin" #define CAM_LANES 4 &deserializer_0_ports { #address-cells = <1>; #size-cells = <0>; /* FPDLink RX 0 */ port@0 { reg = <0>; ub960_fpd3_1_in: endpoint { remote-endpoint = <&ub953_1_out>; }; }; }; &deserializer_0_links { #address-cells = <1>; #size-cells = <0>; link@0 { reg = <0>; i2c-alias = <0x44>; ti,rx-mode = <3>; serializer: serializer { compatible = "ti,ds90ub953-q1"; gpio-controller; #gpio-cells = <2>; #clock-cells = <0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; ub953_1_in: endpoint { data-lanes = <1 2 3 4>; remote-endpoint = <&sensor_1_out>; }; }; port@1 { reg = <1>; ub953_1_out: endpoint { remote-endpoint = <&ub960_fpd3_1_in>; }; }; }; i2c { #address-cells = <1>; #size-cells = <0>; gpio_exp: expander-chip0@74 { compatible = "ti,tca9539"; reg = <0x74>; gpio-controller; #gpio-cells = <2>; }; thermal_sensor: thermal0@48 { compatible = "ti,tmp112"; reg = <0x48>; }; isx031@42 { compatible = "aptina,isx031"; reg = <0x42>; clocks = <&serializer>; clock-names = "xclk"; assigned-clocks = <&serializer>; assigned-clock-rates = <24000000>; deserializer = <0x7>; reset-gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio_exp 0 GPIO_ACTIVE_HIGH>; led-gpios = <&gpio_exp 5 GPIO_ACTIVE_HIGH>; temp-gpios = <&gpio_exp 6 GPIO_ACTIVE_HIGH>; camera-mipi-clk = <300>; camera_mipi_lanes = <CAM_LANES>; mcu_fw_name = MCU_FW_FILE; spi_mcu_fw_name = SPI_BOOT_DATA_FILE; default_framerate = <30>; port { sensor_1_out: endpoint { remote-endpoint = <&ub953_1_in>; link-frequencies = /bits/ 64 <462000000>; clock-lanes = <0>; data-lanes = <1 2 3 4>; }; }; }; }; }; }; };
谢谢、
你好、Lucas、
我在 ds90ub960 和 ds90ub953 初始化期间附加 I2C 事务 。
[ 10.381876] ds90ub960 6-0030: UB960 regmap_write : reg=0x01 val=0x02 [ 10.390060] ds90ub960 6-0030: UB960 regmap_write : reg=0x0C val=0x00 [ 10.390397] ds90ub960 6-0030: UB960 regmap_write : reg=0x1F val=0x00 [ 10.392126] ds90ub960 6-0030: UB960 regmap_write : reg=0x32 val=0x01 [ 10.392715] ds90ub960 6-0030: UB960 regmap_write : reg=0x33 val=0x42 [ 10.392830] ds90ub960 6-0030: UB960 regmap_write : reg=0x4C val=0x01 [ 10.392930] ds90ub960 6-0030: UB960 regmap_update : reg=0x58 mask=0x07 val=0x06 [ 10.393166] ds90ub960 6-0030: UB960 regmap_update : reg=0x6D mask=0x03 val=0x00 [ 10.393306] ds90ub960 6-0030: UB960 regmap_update : reg=0x7C mask=0x03 val=0x00 [ 10.393447] ds90ub960 6-0030: UB960 regmap_write : reg=0xD8 val=0x07 [ 10.459005] ds90ub960 6-0030: UB960 regmap_write : reg=0xD9 val=0x7F [ 10.470257] ds90ub960 6-0030: UB960 regmap_update : reg=0x58 mask=0x40 val=0x40 [ 10.494347] ds90ub960 6-0030: UB960 regmap_write : reg=0x5C val=0x88 [ 10.582385] ds90ub960 6-0030: UB960 regmap_write : reg=0x42 val=0x71 [ 10.600572] ds90ub960 6-0030: UB960 regmap_write : reg=0x41 val=0xA9 [ 10.619520] ds90ub960 6-0030: UB960 regmap_write : reg=0xB0 val=0x04 [ 10.642135] ds90ub960 6-0030: UB960 regmap_write : reg=0xB1 val=0x08 [ 10.671407] ds90ub960 6-0030: UB960 regmap_write : reg=0xB2 val=0x08 [ 10.695782] ds90ub960 6-0030: UB960 regmap_write : reg=0xB1 val=0x09 [ 10.706346] ds90ub960 6-0030: UB960 regmap_write : reg=0xB2 val=0x08 [ 10.713728] ds90ub960 6-0030: UB960 regmap_write : reg=0xD5 val=0xE0 [ 10.777060] ds90ub960 6-0030: UB960 regmap_update : reg=0xD2 mask=0x04 val=0x04 [ 10.805319] ds90ub960 6-0030: UB960 regmap_update : reg=0xD4 mask=0x01 val=0x00 [ 10.850896] ds90ub960 6-0030: UB960 regmap_update : reg=0x0C mask=0x01 val=0x01 [ 10.862010] ds90ub960 6-0030: UB960 regmap_write : reg=0x01 val=0x01 [ 11.157115] ds90ub960 6-0030: UB960 regmap_write : reg=0xB1 val=0x08 [ 11.278683] ds90ub960 6-0030: UB960 regmap_write : reg=0xB1 val=0x09 [ 11.288249] ds90ub960 6-0030: UB960 regmap_write : reg=0x4C val=0x12 [ 11.408107] ds90ub960 6-0030: UB960 regmap_write : reg=0x4C val=0x24 [ 11.461581] ds90ub960 6-0030: UB960 regmap_write : reg=0x4C val=0x38 [ 12.301800] ds90ub953 6-0044: UB953 regmap_write : reg=0x0B val=0x13 [ 12.310013] ds90ub953 6-0044: UB953 regmap_write : reg=0x0C val=0x26 [ 12.333225] ds90ub953 6-0044: UB953 regmap_write : reg=0x02 val=0x72 [ 12.343415] ds90ub953 6-0044: UB953 regmap_write : reg=0x0D val=0x00 [ 12.351150] ds90ub953 6-0044: UB953 regmap_write : reg=0x0E val=0x0F [ 12.359737] ds90ub953 6-0044: UB953 regmap_write : reg=0x06 val=0x41 [ 12.369257] ds90ub953 6-0044: UB953 regmap_write : reg=0x07 val=0x28 [ 12.384041] ds90ub960 6-0030: UB960 regmap_write : reg=0x4C val=0x01 [ 12.391155] ds90ub960 6-0030: UB960 regmap_write : reg=0x5D val=0x84 [ 12.403604] ds90ub960 6-0030: UB960 regmap_write : reg=0x65 val=0x66 [ 12.458824] ds90ub960 6-0030: UB960 regmap_write : reg=0x5E val=0xE8 [ 12.475322] ds90ub960 6-0030: UB960 regmap_write : reg=0x66 val=0x68 [ 12.595583] ds90ub953 6-0044: UB953 regmap_write : reg=0x06 val=0x43 [ 12.608792] ds90ub953 6-0044: UB953 regmap_write : reg=0x07 val=0x7D
尊敬的 Jeyaprakash:
感谢您的耐心。 我已经查看了您的 I2C 日志、发现初始化序列没有任何明显的问题。 我用 960 和 953 EVM 运行该序列、并且器件始终锁定。
我有几个问题可以更好地理解这个问题。
此致、
Lucas