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[参考译文] TCAN4550:CANbus 停止在 ifconfig 中增加 RX 字节值

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Other Parts Discussed in Thread: TCAN4550
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1077682/tcan4550-canbus-stops-incrementing-the-rx-byte-values-in-ifconfig

部件号:TCAN4550
“线程: 测试”中讨论的其它部件

大家好,团队

当我使用 tcan4x5x 驱动程序时,我正在连续执行发送 cansend 数据。 发送数据时,ifconfig 中 RX 字节的值将相应地递增。 在一定程度上,RX 数据包增量停止,并且无法接收和发送更多数据。 目前,驱动程序没有发出错误信息。

$ ifconfig
CAN0     链路接口:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00  
          正在运行 NOARP MTU:16 公制:1.
          Rx 数据包:65212错误:0丢弃:0溢出:0帧:0
          Tx 数据包:65213错误:0丢弃:2溢出:0载波:2
          冲突:0 txqueuelen:10.
          Rx 字节:521696 (509.4 KiB) TX 字节:521704 (509.4 KiB)
          中断:72

当我运行“ifconfig CAN0 down”并发送 cansend (CAN 初始化后)命令时,RX 数据包开始递增,并在一定时间后停止。

请帮我解决这个问题。

此致,
艾沙特

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好,AyshaT,

    您以何种速度运行 CAN,SPI 以何种速度运行?

    您使用什么设备发送 SPI 数据?

    最后,您的 CAN 网络是什么样子的? 是一台设备处于环回模式,还是有多台设备?

    最佳

    克里斯

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好,Chris,

        感谢您的及时回复。     
        您以何种速度运行 CAN,SPI 以何种速度运行?
         1. CAN 比特率:250kbps
         2. SPI 速度:5000000Hz
         3.来自外部晶体的 CAN 时钟频率:40MHz
      
        您使用什么设备发送 SPI 数据?
        我们的硬件主板有一个基于 iMx8M 小型处理器的 SOM,2个 SPI 接口和两个 TCAN4550模块。
        测试1:使用两个 TCAN4550模块进行外部环回测试。(参考图像-1)
           数据在同一个硼的 CAN0和 CAN1之间同时发送和接收。
           我们正在从 CAN0向 CAN1发送1个字节,从 CAN1向 CAN0发送2个字节。
           经过几次传输,我们发现,即使一个 CAN 模块发送数据包,但另一个 CAN 模块未收到数据包,如我之前的邮件所述。 已附加用于此测试的脚本。

         

    #!/bin/bash
    
    # Initialize can0 and can 1 interfaces
    ip link set can0 down
    ip link set can1 down
    ip link set can0 type can bitrate 2500000
    ip link set can1 type can bitrate 2500000
    ip link set can0 up
    ip link set can1 up
    
    # Initialize RX packet counts
    can0rx=$(ifconfig can0 | awk 'match($0, /RX packets:([0-9]+)/, rx) {print rx[1]}')
    can1rx=$(ifconfig can1 | awk 'match($0, /RX packets:([0-9]+)/, rx) {print rx[1]}')
    can0rx_last=$can0rx-1
    can1rx_last=$can1rx-1
    
    pass=0
    until [[ (can0rx -eq can0rx_last) || (can1rx -eq can1rx_last) ]]; 
    #while [ 1 ]
    do
        # Update variables
        let pass++
        can0rx_last=$can0rx
        can1rx_last=$can1rx
    
        # Send messages on both CAN interfaces
        cansend can0 520#10 & cansend can1 521#1010
        sleep 1
        
        # Get current RX packet counts
        can0rx=$(ifconfig can0 | awk 'match($0, /RX packets:([0-9]+)/, rx) {print rx[1]}')
        can1rx=$(ifconfig can1 | awk 'match($0, /RX packets:([0-9]+)/, rx) {print rx[1]}')
        echo "[Pass ${pass}]  can0:${can0rx}  can1:${can1rx}"
    done
    
    echo "CAN fault detected!"
    

        测试2:使用 ECUSim2000模拟器的主板的 TCAN4550 (CAN0)(参考图像-2)
          请求从我们的主板的 CAN0发送到 ECUSim2000模拟器,并从模拟器接收响应。
           经过一定程度的传输后,我们发现,即使我们的 CAN 模块发送数据包,但我们仍遇到超时错误。
           这意味着我们没有收到仿真器的响应,它由于某些原因而停止。

        您的 CAN 网络是什么样子的? 是一台设备处于环回模式,还是有多台设备?
        我已附上这些图像供您参考。 在同一电路板的两个 CAN 模块之间进行一次外部回路测试
        另一项测试是在一个 CAN 模块和模拟器之间进行的。  

      

    此致,
    艾沙特

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    AyshaT,

    根据 SPI 驱动程序的不同,SPI 数据发送速度可能太快,并导致 MCU FIFO 出现溢出错误。  您能否验证在 RX 字节停止增量时是否已填充 FIFO?  

    如果出现这种情况,则 FIFO 溢出导致的错误可能导致 TCAN4550停止发送数据。

    最佳

    克里斯

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好,Chris,

    • 中断寄存器1050的值

             当数据在 RX 寄存器中时:3.
             当数据在 TX 寄存器中时:1800

            这表明 RX 和 TX 没有溢出。我已将脚本的输出(在以前的邮件中共享)与捕获的寄存器值连接在一起。

    root@iWave-G39H:~# ./can_test.sh 
    [  140.472640] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.485478] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.496864] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.508525] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.520008] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.528669] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=0
    [  140.536943] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=3
    [  140.545325] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=3
    [  140.553390] [DEBUG_NEW] tcan4x5x_read_reg reg=10,  priv->reg_offset + reg = 1010, val=80
    [  140.561966] [DEBUG_NEW] tcan4x5x_read_reg reg=1c,  priv->reg_offset + reg = 101c, val=41a03
    [  140.570344] [DEBUG-NEW] m_can_set_bittiming kkk=41a03
    [  140.575476] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=3
    [  140.583861] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=0
    [  140.629823] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.638681] IPv6: ADDRCONF(NETDEV_CHANGE): can0: link becomes ready
    [  140.645089] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.653732] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.662368] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=0
    [  140.670690] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=3
    [  140.679037] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=3
    [  140.687163] [DEBUG_NEW] tcan4x5x_read_reg reg=10,  priv->reg_offset + reg = 1010, val=80
    [  140.697000] [DEBUG_NEW] tcan4x5x_read_reg reg=1c,  priv->reg_offset + reg = 101c, val=41a03
    [  140.705378] [DEBUG-NEW] m_can_set_bittiming kkk=41a03
    [  140.710770] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=3
    [  140.719429] [DEBUG_NEW] tcan4x5x_read_reg reg=18,  priv->reg_offset + reg = 1018, val=0
    [  140.766051] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [  140.791789] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  140.791792] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  140.791845] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  140.799913] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  140.808083] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=0
    [  140.816134] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=0
    [  140.824132] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10006
    [  140.824279] [DEBUG-NEW]  m_can_isr start can1
    [  140.824281] [DEBUG-NEW]  m_can_isr start can0
    [  140.824342] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  140.824344] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  140.824345] [DEBUG-NEW] 1.m_can_isr 3
    [  140.824346] [DEBUG-NEW] 1.m_can_isr 1800
    [  140.824594] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=10001
    [  140.824636] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=10001
    [  140.824641] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  140.824643] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  140.824704] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  140.824737] NOHZ: local_softirq_pending 08
    [  140.824739] NOHZ: local_softirq_pending 08
    [  140.824753] NOHZ: local_softirq_pending 08
    [  140.824757] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=10001
    [  140.824760] NOHZ: local_softirq_pending 08
    [  140.824772] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  140.824778] [DEBUG-NEW] m_can_isr end can0
    [  140.824979] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=10100
    [  140.825020] [DEBUG-NEW] m_can_rx_peripheral kk = 1
    [  140.825022] [DEBUG-NEW] m_can_isr end can1
    [  140.825028] [DEBUG-NEW]  m_can_isr start can1
    [  140.825070] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  140.832270] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10006
    [  140.832481] [DEBUG-NEW]  m_can_isr start can0
    [  140.832482] [DEBUG-NEW]  m_can_isr start can1
    [  140.832534] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  140.832536] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  140.832537] [DEBUG-NEW] 1.m_can_isr 3
    [  140.832538] [DEBUG-NEW] 1.m_can_isr 1800
    [  140.832829] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=10001
    [  140.832895] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=10001
    [  140.832897] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  140.832899] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  140.832943] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  140.832989] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=10001
    [  140.833070] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  140.833076] [DEBUG-NEW] m_can_isr end can1
    [  140.833195] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=10100
    [  140.833235] [DEBUG-NEW] m_can_rx_peripheral kk = 2
    [  140.833237] [DEBUG-NEW] m_can_isr end can0
    [  141.662122] IPv6: ADDRCONF(NETDEV_CHANGE): can1: link becomes ready
    [  141.668553] [DEBUG_NEW] tcan4x5x_read_reg reg=40,  priv->reg_offset + reg = 1040, val=0
    [Pass 1]  can0:1  can1:1
    [  141.816070] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  141.816232] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  141.824564] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  141.832929] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  141.841472] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  141.849799] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  141.858000] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20106
    [  141.858232] [DEBUG-NEW]  m_can_isr start can1
    [  141.858233] [DEBUG-NEW]  m_can_isr start can0
    [  141.858297] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  141.858299] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  141.858300] [DEBUG-NEW] 1.m_can_isr 3
    [  141.858301] [DEBUG-NEW] 1.m_can_isr 1800
    [  141.858568] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=20101
    [  141.858612] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  141.858614] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=20101
    [  141.858615] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  141.858666] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  141.858715] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=20101
    [  141.858783] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  141.858790] [DEBUG-NEW] m_can_isr end can1
    [  141.858935] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=20200
    [  141.858979] [DEBUG-NEW] m_can_rx_peripheral kk = 3
    [  141.858981] [DEBUG-NEW] m_can_isr end can0
    [  141.866271] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20106
    [  141.866494] [DEBUG-NEW]  m_can_isr start can1
    [  141.866496] [DEBUG-NEW]  m_can_isr start can0
    [  141.866553] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  141.866555] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  141.866556] [DEBUG-NEW] 1.m_can_isr 3
    [  141.866557] [DEBUG-NEW] 1.m_can_isr 1800
    [  141.866841] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=20101
    [  141.866884] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  141.866887] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=20101
    [  141.866888] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  141.866934] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  141.866977] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=20101
    [  141.867029] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  141.867035] [DEBUG-NEW] m_can_isr end can0
    [  141.867188] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=20200
    [  141.867229] [DEBUG-NEW] m_can_rx_peripheral kk = 4
    [  141.867233] [DEBUG-NEW] m_can_isr end can1
    [Pass 2]  can0:2  can1:2
    [  142.838847] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  142.847270] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  142.855678] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  142.855752] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  142.872645] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  142.872693] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  142.889276] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30206
    [  142.889312] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30206
    [  142.897944] [DEBUG-NEW]  m_can_isr start can0
    [  142.906024] [DEBUG-NEW]  m_can_isr start can1
    [  142.906093] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  142.923051] [DEBUG-NEW] 1.m_can_isr 1803
    [  142.923056] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  142.927265] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  142.935251] [DEBUG-NEW] 1.m_can_isr 1803
    [  142.947215] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  142.952515] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  142.960771] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=30201
    [  142.969362] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=30300
    [  142.977803] [DEBUG-NEW] m_can_rx_peripheral kk = 5
    [  142.982625] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  142.982662] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=30201
    [  142.990657] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  142.999067] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=30201
    [  143.012773] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  143.021165] [DEBUG-NEW] m_can_isr end can1
    [  143.021425] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  143.033774] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=30201
    [  143.043224] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=30300
    [  143.051892] [DEBUG-NEW] m_can_rx_peripheral kk = 6
    [  143.056750] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=30201
    [  143.065167] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=30201
    [  143.073912] NOHZ: local_softirq_pending 08
    [  143.078336] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  143.086716] [DEBUG-NEW] m_can_isr end can0
    [Pass 3]  can0:3  can1:3
    [  143.860831] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  143.860833] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  143.860885] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  143.870487] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  143.878461] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  143.886756] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  143.894751] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40306
    [  143.894984] [DEBUG-NEW]  m_can_isr start can1
    [  143.895046] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  143.895048] [DEBUG-NEW] 1.m_can_isr 3
    [  143.895321] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  143.895323] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  143.895365] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  143.895409] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=40301
    [  143.895624] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=40400
    [  143.895665] [DEBUG-NEW] m_can_rx_peripheral kk = 7
    [  143.895667] [DEBUG-NEW] m_can_isr end can1
    [  143.903077] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40306
    [  143.903287] [DEBUG-NEW]  m_can_isr start can1
    [  143.903339] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  143.903341] [DEBUG-NEW] 1.m_can_isr 1800
    [  143.903593] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=40301
    [  143.903632] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=40301
    [  143.903762] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  143.903768] [DEBUG-NEW] m_can_isr end can1
    [  143.911237] [DEBUG-NEW]  m_can_isr start can0
    [  143.911299] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  144.049006] [DEBUG-NEW] 1.m_can_isr 1803
    [  144.053576] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  144.061595] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  144.067182] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  144.075445] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=40301
    [  144.084100] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=40400
    [  144.092513] [DEBUG-NEW] m_can_rx_peripheral kk = 8
    [  144.097367] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=40301
    [  144.105776] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=40301
    [  144.114240] NOHZ: local_softirq_pending 08
    [  144.118392] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  144.126753] [DEBUG-NEW] m_can_isr end can0
    [Pass 4]  can0:4  can1:4
    [  144.890300] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  144.890302] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  144.890357] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  144.899168] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  144.907505] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  144.915905] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  144.924179] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50406
    [  144.924405] [DEBUG-NEW]  m_can_isr start can0
    [  144.924407] [DEBUG-NEW]  m_can_isr start can1
    [  144.924467] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  144.924469] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  144.924470] [DEBUG-NEW] 1.m_can_isr 3
    [  144.924471] [DEBUG-NEW] 1.m_can_isr 1800
    [  144.924722] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=50401
    [  144.924761] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  144.924763] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=50401
    [  144.924765] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  144.924814] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  144.924867] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=50401
    [  144.924946] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  144.924952] [DEBUG-NEW] m_can_isr end can1
    [  144.925076] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=50500
    [  144.925117] [DEBUG-NEW] m_can_rx_peripheral kk = 9
    [  144.925119] [DEBUG-NEW] m_can_isr end can0
    [  144.932486] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50406
    [  144.932714] [DEBUG-NEW]  m_can_isr start can0
    [  144.932716] [DEBUG-NEW]  m_can_isr start can1
    [  144.932774] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  144.932775] [DEBUG-NEW] 1.m_can_isr 1800
    [  144.932778] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  144.932779] [DEBUG-NEW] 1.m_can_isr 3
    [  144.933026] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=50401
    [  144.933069] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=50401
    [  144.933158] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  144.933160] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  144.933169] NOHZ: local_softirq_pending 08
    [  144.933171] NOHZ: local_softirq_pending 08
    [  144.933181] NOHZ: local_softirq_pending 08
    [  144.933184] NOHZ: local_softirq_pending 08
    [  144.933199] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  144.933206] [DEBUG-NEW] m_can_isr end can0
    [  144.933209] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  144.933252] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=50401
    [  144.933888] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=50500
    [  144.933935] [DEBUG-NEW] m_can_rx_peripheral kk = 10
    [  144.933937] [DEBUG-NEW] m_can_isr end can1
    [Pass 5]  can0:5  can1:5
    [  145.922747] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  145.922749] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  145.922798] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  145.939560] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  145.956532] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  145.964968] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60506
    [  145.973370] [DEBUG-NEW]  m_can_isr start can1
    [  145.973664] [DEBUG-NEW]  m_can_isr start can0
    [  145.982178] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  145.990455] [DEBUG-NEW] 1.m_can_isr 1800
    [  145.994798] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  146.002826] [DEBUG-NEW] 1.m_can_isr 3
    [  146.006562] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a2
    [  146.006843] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  146.014852] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=60501
    [  146.022850] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  146.036515] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=60501
    [  146.045223] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.045287] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  146.061801] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.061836] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=60501
    [  146.070163] [DEBUG-NEW] m_can_isr end can0
    [  146.078523] [DEBUG-NEW]  m_can_isr start can0
    [  146.086998] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  146.087215] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=60600
    [  146.095010] [DEBUG-NEW] 1.m_can_isr 3
    [  146.107103] [DEBUG-NEW] m_can_rx_peripheral kk = 11
    [  146.111999] [DEBUG-NEW] m_can_isr end can1
    [  146.116122] [DEBUG-NEW]  m_can_isr start can1
    [  146.120539] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  146.128825] [DEBUG-NEW] 1.m_can_isr 1800
    [  146.132993] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=60501
    [  146.141430] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=60501
    [  146.149928] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.158299] [DEBUG-NEW] m_can_isr end can1
    [  146.162715] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  146.170733] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  146.175766] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  146.184018] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=60501
    [  146.192611] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=60600
    [  146.201033] [DEBUG-NEW] m_can_rx_peripheral kk = 12
    [  146.205927] [DEBUG-NEW] m_can_isr end can0
    [Pass 6]  can0:6  can1:6
    [  146.947003] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.947212] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.963791] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.963829] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  146.980758] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  146.989153] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=606
    [  146.997361] [DEBUG-NEW]  m_can_isr start can0
    [  147.001749] [DEBUG-NEW]  m_can_isr start can1
    [  147.006165] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  147.014449] [DEBUG-NEW] 1.m_can_isr 1800
    [  147.014743] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  147.018642] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=70601
    [  147.026386] [DEBUG-NEW] 1.m_can_isr 3
    [  147.038468] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=70601
    [  147.046971] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.055000] [DEBUG-NEW] m_can_isr end can1
    [  147.059692] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=0
    [  147.068142] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  147.076161] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  147.081544] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=718
    [  147.081844] [DEBUG-NEW]  m_can_isr start can1
    [  147.094140] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=70601
    [  147.094177] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  147.110524] [DEBUG-NEW] 1.m_can_isr 3
    [  147.114478] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  147.114536] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.122502] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  147.135530] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  147.143775] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=70601
    [  147.152360] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=70700
    [  147.160769] [DEBUG-NEW] m_can_rx_peripheral kk = 13
    [  147.165672] [DEBUG-NEW] m_can_isr end can1
    [  147.170445] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=70700
    [  147.178862] [DEBUG-NEW] m_can_rx_peripheral kk = 14
    [  147.183757] [DEBUG-NEW] m_can_isr end can0
    [  147.187882] [DEBUG-NEW]  m_can_isr start can0
    [  147.192322] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  147.200602] [DEBUG-NEW] 1.m_can_isr 1800
    [  147.204801] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=70601
    [  147.213212] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=70601
    [  147.221821] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.229856] [DEBUG-NEW] m_can_isr end can0
    [Pass 7]  can0:7  can1:7
    [  147.969938] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.969947] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.978086] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.986058] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  147.994266] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  148.002446] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  148.010519] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10006
    [  148.010753] [DEBUG-NEW]  m_can_isr start can1
    [  148.010804] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  148.010805] [DEBUG-NEW] 1.m_can_isr 3
    [  148.011086] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  148.011088] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  148.011130] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  148.011173] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=80701
    [  148.011384] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=80800
    [  148.011425] [DEBUG-NEW] m_can_rx_peripheral kk = 15
    [  148.011427] [DEBUG-NEW] m_can_isr end can1
    [  148.018680] [DEBUG-NEW]  m_can_isr start can0
    [  148.018740] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  148.102563] [DEBUG-NEW] 1.m_can_isr 1800
    [  148.106955] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10006
    [  148.107113] [DEBUG-NEW]  m_can_isr start can1
    [  148.119757] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  148.128098] [DEBUG-NEW] 1.m_can_isr 1800
    [  148.132301] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=80701
    [  148.132341] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=80701
    [  148.140719] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=80701
    [  148.157407] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=80701
    [  148.157538] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  148.174131] [DEBUG-NEW] m_can_isr end can1
    [  148.178630] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  148.187017] [DEBUG-NEW] m_can_isr end can0
    [  148.191149] [DEBUG-NEW]  m_can_isr start can0
    [  148.195859] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  148.203878] [DEBUG-NEW] 1.m_can_isr 3
    [  148.211395] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  148.219414] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  148.224718] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  148.233260] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=80701
    [  148.242142] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=80800
    [  148.250842] [DEBUG-NEW] m_can_rx_peripheral kk = 16
    [  148.255735] [DEBUG-NEW] m_can_isr end can0
    [Pass 8]  can0:8  can1:8
    [  148.991761] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  148.991936] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  149.000452] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  149.008752] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=10107
    [  149.017336] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  149.025677] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  149.033902] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20106
    [  149.034120] [DEBUG-NEW]  m_can_isr start can1
    [  149.034173] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  149.034175] [DEBUG-NEW] 1.m_can_isr 1800
    [  149.034415] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=90801
    [  149.034458] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=90801
    [  149.034598] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  149.034604] [DEBUG-NEW] m_can_isr end can1
    [  149.042061] [DEBUG-NEW]  m_can_isr start can0
    [  149.042123] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  149.108476] [DEBUG-NEW] 1.m_can_isr 3
    [  149.112407] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20106
    [  149.112526] [DEBUG-NEW]  m_can_isr start can1
    [  149.125203] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  149.133241] [DEBUG-NEW] 1.m_can_isr 3
    [  149.136935] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  149.137244] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  149.145213] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  149.158467] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  149.158480] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  149.163502] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  149.179822] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=90801
    [  149.179855] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=90801
    [  149.196822] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=90900
    [  149.205238] [DEBUG-NEW] m_can_rx_peripheral kk = 17
    [  149.210137] [DEBUG-NEW] m_can_isr end can1
    [  149.214682] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=90900
    [  149.223093] [DEBUG-NEW] m_can_rx_peripheral kk = 18
    [  149.227985] [DEBUG-NEW] m_can_isr end can0
    [  149.232113] [DEBUG-NEW]  m_can_isr start can0
    [  149.236537] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  149.244821] [DEBUG-NEW] 1.m_can_isr 1800
    [  149.249005] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=90801
    [  149.257425] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=90801
    [  149.266225] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  149.274607] [DEBUG-NEW] m_can_isr end can0
    [Pass 9]  can0:9  can1:9
    [  150.013653] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  150.013832] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  150.022272] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  150.030678] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=20207
    [  150.039187] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  150.047601] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  150.055775] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30206
    [  150.056007] [DEBUG-NEW]  m_can_isr start can1
    [  150.056062] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  150.056064] [DEBUG-NEW] 1.m_can_isr 1800
    [  150.056299] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=a0901
    [  150.056342] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=a0901
    [  150.056484] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  150.056489] [DEBUG-NEW] m_can_isr end can1
    [  150.063987] [DEBUG-NEW]  m_can_isr start can0
    [  150.122689] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  150.130713] [DEBUG-NEW] 1.m_can_isr 3
    [  150.134628] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30206
    [  150.134747] [DEBUG-NEW]  m_can_isr start can1
    [  150.147474] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  150.155564] [DEBUG-NEW] 1.m_can_isr 3
    [  150.159261] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  150.159265] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  150.167850] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  150.180803] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  150.180810] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  150.185828] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  150.202195] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=a0901
    [  150.210773] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=a0a00
    [  150.210862] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=a0901
    [  150.219184] [DEBUG-NEW] m_can_rx_peripheral kk = 19
    [  150.232401] [DEBUG-NEW] m_can_isr end can1
    [  150.236659] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=a0a00
    [  150.245073] [DEBUG-NEW] m_can_rx_peripheral kk = 20
    [  150.249965] [DEBUG-NEW] m_can_isr end can0
    [  150.254086] [DEBUG-NEW]  m_can_isr start can0
    [  150.258788] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  150.267066] [DEBUG-NEW] 1.m_can_isr 1800
    [  150.271254] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=a0901
    [  150.279678] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=a0901
    [  150.288476] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  150.296858] [DEBUG-NEW] m_can_isr end can0
    [Pass 10]  can0:10  can1:10
    [  151.039548] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  151.047988] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  151.048047] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  151.064760] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=30307
    [  151.073314] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  151.073391] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  151.089968] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40306
    [  151.090005] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40306
    [  151.098344] [DEBUG-NEW]  m_can_isr start can0
    [  151.106750] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  151.111109] [DEBUG-NEW]  m_can_isr start can1
    [  151.119361] [DEBUG-NEW] 1.m_can_isr 1803
    [  151.127757] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  151.136040] [DEBUG-NEW] 1.m_can_isr 1803
    [  151.140288] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  151.148307] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  151.153590] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  151.161846] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=b0a01
    [  151.170439] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=b0b00
    [  151.178858] [DEBUG-NEW] m_can_rx_peripheral kk = 21
    [  151.183800] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=b0a01
    [  151.192216] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=b0a01
    [  151.200735] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  151.200897] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  151.209108] [DEBUG-NEW] m_can_isr end can1
    [  151.221215] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  151.226785] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  151.235326] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=b0a01
    [  151.244199] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=b0b00
    [  151.252606] [DEBUG-NEW] m_can_rx_peripheral kk = 22
    [  151.257846] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=b0a01
    [  151.266543] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=b0a01
    [  151.275324] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  151.283703] [DEBUG-NEW] m_can_isr end can0
    [Pass 11]  can0:11  can1:11
    [  152.062410] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  152.071086] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  152.079482] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  152.079528] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=40407
    [  152.096406] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  152.096465] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  152.113039] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50406
    [  152.113128] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50406
    [  152.121415] [DEBUG-NEW]  m_can_isr start can0
    [  152.134150] [DEBUG-NEW]  m_can_isr start can1
    [  152.134155] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  152.138566] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1803
    [  152.146780] [DEBUG-NEW] 1.m_can_isr 1803
    [  152.158980] [DEBUG-NEW] 1.m_can_isr 1803
    [  152.163161] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  152.163236] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  152.171179] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  152.184428] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  152.184723] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  152.189710] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  152.206082] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=c0b01
    [  152.214650] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=c0c00
    [  152.214752] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=c0b01
    [  152.223071] [DEBUG-NEW] m_can_rx_peripheral kk = 23
    [  152.236304] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=c0b01
    [  152.244717] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=c0b01
    [  152.253243] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  152.261621] [DEBUG-NEW] m_can_isr end can1
    [  152.266784] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=c0c00
    [  152.275238] [DEBUG-NEW] m_can_rx_peripheral kk = 24
    [  152.280188] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=c0b01
    [  152.288615] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=c0b01
    [  152.297105] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  152.305491] [DEBUG-NEW] m_can_isr end can0
    [Pass 12]  can0:12  can1:12
    [  153.084029] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  153.084032] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  153.084091] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  153.092986] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=50507
    [  153.102172] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  153.109840] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  153.117922] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60506
    [  153.118162] [DEBUG-NEW]  m_can_isr start can1
    [  153.118217] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  153.118219] [DEBUG-NEW] 1.m_can_isr 3
    [  153.118510] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  153.118512] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  153.118556] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  153.118600] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=d0c01
    [  153.118824] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=d0d00
    [  153.118866] [DEBUG-NEW] m_can_rx_peripheral kk = 25
    [  153.118868] [DEBUG-NEW] m_can_isr end can1
    [  153.126111] [DEBUG-NEW]  m_can_isr start can0
    [  153.126180] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  153.218229] [DEBUG-NEW] 1.m_can_isr 1800
    [  153.222507] [DEBUG-NEW]  m_can_isr start can1
    [  153.226882] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  153.235315] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  153.243609] [DEBUG-NEW] 1.m_can_isr 1800
    [  153.243618] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=d0c01
    [  153.247878] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=d0c01
    [  153.264279] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=d0c01
    [  153.264316] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=d0c01
    [  153.281149] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  153.289520] [DEBUG-NEW] m_can_isr end can1
    [  153.293785] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  153.302169] [DEBUG-NEW] m_can_isr end can0
    [  153.306595] [DEBUG-NEW]  m_can_isr start can0
    [  153.311307] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  153.319321] [DEBUG-NEW] 1.m_can_isr 3
    [  153.323851] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=0
    [  153.331877] [DEBUG-NEW] m_can_rx_handler irqstatus=3
    [  153.336908] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  153.345427] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=d0c01
    [  153.354566] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=d0d00
    [  153.362971] [DEBUG-NEW] m_can_rx_peripheral kk = 26
    [  153.367868] [DEBUG-NEW] m_can_isr end can0
    [Pass 13]  can0:13  can1:13
    [  154.123354] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  154.123358] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  154.123414] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  154.140198] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=60607
    [  154.148822] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  154.165387] [DEBUG_NEW] tcan4x5x_read_reg reg=820,  priv->reg_offset + reg = 1820, val=4a0
    [  154.165390] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=606
    [  154.165612] [DEBUG-NEW]  m_can_isr start can1
    [  154.165892] [DEBUG-NEW]  m_can_isr start can0
    [  154.182035] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=3
    [  154.186272] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  154.190571] [DEBUG-NEW] 1.m_can_isr 3
    [  154.198631] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  154.206887] [DEBUG-NEW] 1.m_can_isr 1800
    [  154.207134] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=e0d01
    [  154.230925] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=e0d01
    [  154.239385] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  154.239445] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  154.247661] [DEBUG-NEW] m_can_rx_handler irqstatus=1803
    [  154.260913] [DEBUG-NEW] m_can_isr end can1
    [  154.261212] [DEBUG_NEW] tcan4x5x_read_reg reg=44,  priv->reg_offset + reg = 1044, val=708
    [  154.273276] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=e0d01
    [  154.282124] [DEBUG_NEW] tcan4x5x_read_reg reg=a4,  priv->reg_offset + reg = 10a4, val=e0e00
    [  154.290533] [DEBUG-NEW] m_can_rx_peripheral kk = 27
    [  154.295427] [DEBUG-NEW] m_can_isr end can0
    [  154.299546] [DEBUG-NEW]  m_can_isr start can0
    [  154.304228] [DEBUG_NEW] tcan4x5x_read_reg reg=50,  priv->reg_offset + reg = 1050, val=1800
    [  154.312504] [DEBUG-NEW] 1.m_can_isr 1800
    [  154.316691] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=e0d01
    [  154.325102] [DEBUG_NEW] tcan4x5x_read_reg reg=f4,  priv->reg_offset + reg = 10f4, val=e0d01
    [  154.334194] [DEBUG_NEW] tcan4x5x_read_reg reg=c4,  priv->reg_offset + reg = 10c4, val=7
    [  154.342232] [DEBUG-NEW] m_can_isr end can0
    [Pass 14]  can0:14  can1:13
    CAN fault detected!

    • 当 CAN0和 CAN1之间发生传输时,中断 GPIO 设置为低和高。 但当发生故障时,中断 GPIO 在其中一个 CAN 设备中处于低状态(在 CRO 中观察到)。 在 CAN 设备被设置为关闭之前,GPIO 保持低电平。
    • 当某个 CAN 设备出现故障时,处理器停止接收来自控制器的信号。 这是什么原因?

    此致,
    艾莎·T

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好,Aysha,

    您能否提供 SPI 线路的一些范围快照? 我们希望看到 SPI 驱动程序的效率如何。 您使用的是哪个版本的驱动程序?

    保持低位的中断表明存在一些计时问题,导致驱动程序卡滞。

    最佳

    克里斯

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    你好,Chris,

    我使用的是用于 Linux 4.14.98版本的 tcan4x5x 驱动程序。 我已连接从 CRO 捕获的 SPI 线路输出。

    CAN0观察:

    • CS 和 SCLK

    • SCLK 和 MOSI

    • SCLK 和味噌

    CAN1观察:

    • CS 和 SCLK

    • SCLK 和 MOSI

    • SCLK 和味噌

    供参考:我曾观察到内核5.4.70的 tcan4x5x 驱动程序中出现同样的问题。

    此致,
    艾莎·T

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    您好,Chris,

    除了先前的答复,我还附加了发生故障时从 Saleae 逻辑分析仪捕获的 SPI 数据行。

    CAN0 SPI 线路

    CAN1 SPI 线路

    我还注意到,当故障发生时,寄存器中包含
          16'h0820=82 (十六进制)
          16'h0824=3 (十六进制)
    这会导致 GLOBALERR (全局错误(任何故障))。

    这是什么原因? 如何解决这一问题?

    此致,
    艾莎·T

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好,Chris,

    我已经检查了 TI 对全局错误的其他回复(tcan4550-有问题-发送-返回-数据-计时-示例和全局错误),并在下面提供了变通办法,

    •  将 SPI 设置为最大频率: 因此我将 SPI 频率设置为18MHz (最大值)。 甚至发生了故障
    •  将 全局过滤器配置寄存器的 ANFS[1:0]和 ANFE[1:0]位字段设置为 b'10。 即使在将 ANFS 和 ANFE 设置为10后,也会出现故障。

    我们在 m_can.c 文件的例程 m_can_ISR()下添加了以下代码行。 更改后,脚本将继续执行而不会停止。

           IR = m_CAN_read (cdev,M_CAN_IR);
           如果(!ir
                   返回 IRQ_handled;
           }
           如果((IR 和 IR_RF0W)||(IR 和 IR_ERR_All_30X))为{
                   cdev->irqstatus = ir;
                   m_cable_disable_all_interrupts (cdev);
                   如果(!cdev->is_peripheral)
                           NAPI_SCHEDULE(&cdev->NAPI);
                   否则
                           M_CAN_Rx_Peripheral (设备);
           }

    下面是整个例程 m_CAN_ISR。

    static irqreturn_t m_can_isr(int irq, void *dev_id)
    {
            struct net_device *dev = (struct net_device *)dev_id;
            struct m_can_classdev *cdev = netdev_priv(dev);
            struct net_device_stats *stats = &dev->stats;
            u32 ir;
    
            ir = m_can_read(cdev, M_CAN_IR);
            if (!ir)
                    return IRQ_NONE;
    
            /* ACK all irqs */
            if (ir & IR_ALL_INT)
                    m_can_write(cdev, M_CAN_IR, ir);
    
            if (cdev->ops->clear_interrupts)
                    cdev->ops->clear_interrupts(cdev);
    
            /* schedule NAPI in case of
             * - rx IRQ
             * - state change IRQ
             * - bus error IRQ and bus error reporting
             */
            if ((ir & IR_RF0W) || (ir & IR_ERR_ALL_30X)) {
                    cdev->irqstatus = ir;
                    m_can_disable_all_interrupts(cdev);
                    if (!cdev->is_peripheral)
                            napi_schedule(&cdev->napi);
                    else
                            m_can_rx_peripheral(dev);
            }
    
            if (cdev->version == 30) {
                    if (ir & IR_TC) {
                            /* Transmission Complete Interrupt*/
                            stats->tx_bytes += can_get_echo_skb(dev, 0);
                            stats->tx_packets++;
    
                            can_led_event(dev, CAN_LED_EVENT_TX);
                            netif_wake_queue(dev);
                    }
            } else  {
                    if (ir & IR_TEFN) {
                            /* New TX FIFO Element arrived */
                            m_can_echo_tx_event(dev);
                            can_led_event(dev, CAN_LED_EVENT_TX);
                            if (netif_queue_stopped(dev) &&
                                !m_can_tx_fifo_full(cdev))
                                    netif_wake_queue(dev);
                    }
            }
    
            ir = m_can_read(cdev, M_CAN_IR);
            if (!ir){
                    return IRQ_HANDLED;
            }
            if ((ir & IR_RF0W) || (ir & IR_ERR_ALL_30X)) {
                    cdev->irqstatus = ir;
                    m_can_disable_all_interrupts(cdev);
                    if (!cdev->is_peripheral)
                            napi_schedule(&cdev->napi);
                    else
                            m_can_rx_peripheral(dev);
            }
    
            return IRQ_HANDLED;
    }
    

    m_CAN_ISR()中所做的更改是否正确? 这是否会导致其他问题?

    此致,
    艾莎·T

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好,Chris,

    希望你们做得好。
    我甚至在添加了前一份答复中提到的一组行之后,也面临着这个问题。 测试持续了大约13小时。
    请期待解决此故障。

    此致,
    艾莎·T

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    阿亚莎,

    感谢您提供详细信息。 我不太熟悉 Linux 驱动程序如何处理这些情况,但我熟悉在嵌入式设备中使用此设备。

    我认为可能会发生的情况是,SPI0设备由于某些定时事件而错过了中断。 我在嵌入式驱动程序中看到了类似的比赛情况,中断例程假定 nINT 引脚在退出前已被清除,而不是确认。 因此,当它退出 ISR 时,由于它是由边缘触发的,因此永远不会有另一个边缘,并且驾驶员假定没有任何待处理的内容(即使 nINT 线路保持在低位)。

    我将在下面说明。 通常,如果为 ISR 使用边缘触发器,我建议在 ISR 例程结束时清除中断。 ISR 的最后一步是

    1)检查在处理上一个中断时是否出现任何新中断。 (检查 rxf0以查看传入邮箱中仍有多少条消息未读)

    2)如果不是,则清除中断

    您也可以在开始时清除中断,只需在结束时重新检查挂起的中断。我希望看到以下行为。

    我看到这种情况发生的地方是总线负载过高,在这种情况下,ISR 例程可能需要足够长的时间才能在处理以前的 ISR 时引入新的中断(这就是为什么人们建议加快 SPI 速度, 这是对这种情况的帮助)。

    如果出现额外的中断,并且您在 ISR 开始时清除了该中断,则当 CPU 处于 ISR 中时,设备将生成一个边缘。 如果 ISR 没有检查是否存在任何挂起的中断(通过检查 nINT 引脚状态(推荐)或检查中断寄存器),则 ISR 可能在 nINT 引脚仍然处于低位时退出。 如果 ISR 基于边缘,则由于任何进一步的中断都不会切换引脚,CPU 将永远看不到边缘,并认为设备处于空闲状态。 这与您的行为相匹配。

    如果我们看一下故障期间您的示波器,我们就会发现这种情况可能会发生。 我用红色画了一段很长的停顿时间(可能是因为 ISR 点火的优先级更高)。 我在下面画了 nINT pin 可能会做的事。

    最后,驱动程序应该能够在为前一个消息/中断提供服务时处理接收另一个消息/中断的问题。 我对 Linux 驱动程序的熟悉程度不够,无法确定这是什么情况。

    您在上一篇文章中提到,您修改了 ISR 以读取 MCAN_IR,然后清除任何待处理的中断,这似乎已解决了您的大部分问题,但请记住,这在技术上会使您可能丢弃消息的窗口变小, 但不能消除这种状况。 有时,电平触发器更适合此情况,因为如果设备退出 ISR,但 nINT 引脚仍然很低,ISR 将重新触发,并查找挂起的中断。 这种对驾驶员的轻率进一步改善了这种情况,这一事实使我认为,我所描述的这种情况就是目前的情况。 我们应该让这位驾驶员能够优雅地处理这种情况,以确保在高总线负载下进行可靠的通信。

    问题:

    1)在设备树文件中,您的 nINT 引脚是否设置为 EDGE 触发或电平触发?

    2)您能否抓住此故障的范围镜头,但抓住1:Canh 或 CANL (没关系),2:NCS (因此我们可以看到 SPI 活动),3:SCLK (相同原因),4:nINT。 有了这4个信号,我们应该能够验证错过的 INT 是否正在发生,并可以进一步深入研究它。

    3)我看到您提到您从5.4移植了驱动程序,并提到运行5.4时出现了问题。 我知道这是初始版本的升级版,后来(我认为是5.12版)被更改为基本上是 MCAN 驱动程序的包装。 我不知道5.12+内核版本中是否修复了这种情况。 您是否有机会运行5.15并测试相同的情况? 我意识到,由于您的设备,可能无法实现,但我们很想注意到,早期版本的 Linux 驱动程序具有这种竞争状态,可能已经在以后的版本中得到了修正。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    乔纳森您好,

    感谢您的回复。

    我们目前正在研究在中断句柄前后清除中断的建议。 我们将在下一封邮件中更新此信息。

    不回答您的问题:
    在设备树文件中,您的 nINT 引脚是否设置为 EDGE 触发或电平触发?
    我们已在 DTS 文件中配置为 IRQ_TYPE_NONE (默认,未指定类型)。 我已使用 IRQ_TYPE_ARGE_Rising 和 IRQ_TYPE_LEVEL 进行测试。 但故障发生了。

    附加了捕获的范围快照。 我们可以在故障发生前捕获以下数据(CANL)。

    在5.15内核到4.14的 tcan 驱动程序上使用 backport 具有更多的功能相关性。

    此致,
    艾莎·T

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您提到您尝试了 Edge_Rising 和 lever_high。 nINT 引脚是一个 active_low 信号。 是否已尝试 IRQ_TYPE_LEVEL LOW? LEVEL _HIGH 会在没有中断的情况下触发 IRQ,而在发生中断时不会触发 IRQ。

    您应该使用 eitehr geal_Falling (高到低转换是中断事件)或 leve_low (nINT 上的低信号=挂起中断)。

    在范围快照中,您可以尝试缩小更多空间。 我并不关心数据是什么,主要是想了解 SPI 的时间,并且可以与故障发生的时间进行切换。 我在你的范围内没有看到任何内置转换。 您的刻度是5V,所以我假设您使用的是2.5V 的 VIO,而这张照片中的 nINT 实际上是很高的?