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https://e2e.ti.com/support/interface-group/interface/f/interface-forum/694385/tfp401a-tfp401a-ovdd-valid-range
我的应用需要 TFP401A 的并行 RGB 输出为1.8V 逻辑电平。
是否可以 在 DVDD = 3.3V、AVDD = 3.3V、PVDD = 3.3V 和 OVDD = 1.8V 的情况下运行 TFP401A？
这是否会在并行输出信号上实现1.8V 逻辑电平？
数据表暗示这可能是可能的工作模式、但实际上并未说明这是真的。
