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https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1097009/sn74avch8t245-justify-rise-and-fall-times
为什么从高到低的切换时间(上升/下降时间)会随着电压水平的降低而增加？
5V时，切换时间较短，1.8V时，切换时间增加。
MOSFET具有较低的栅源电压，具有较高的导通状态漏源电阻，因此它们需要较长的时间为下列MOSFET的栅极充电。
有意义， 谢谢你。
