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https://e2e.ti.com/support/logic-group/logic/f/logic-forum/917420/sn74als541-when-74als541-is-not-powered-can-applying-3-4v-less-than-absolute-maximum-ratings-to-output-pin-will-this-cause-any-damage-to-this-device
当74ALS541未上电时、是否可以对输出引脚施加3.4V (小于绝对最大额定值)的电压、这是否会对该器件造成任何损坏？
绝对最大额定值允许仅在输出引脚处于高阻抗状态时才向其施加高达5.5V 的电压。 数据表中并未说明未供电器件的输出处于高阻抗状态。
但是 、5V 电源电压下数字集成电路的输入和输出特性图23 意味着、即使处于活动状态、ALS 三态输出也可以承受过压。
如果您想确定、则必须测量输出在这种情况下是否吸收任何电流。
