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https://e2e.ti.com/support/logic-group/logic/f/logic-forum/820001/lsf0108-what-input-impedance-when-en-pin-low
你(们)好，先生
我们将 LSF0108用于 MDC/MDIO 电平位移1.2V 至3.3V。
当 EN 引脚为低电平时、A1、A2的输入阻抗是多少？
当 EN 引脚被拉低时、内部开关永远不会打开、因此引脚本身具有高阻抗、并且两侧断开。
但是、外部上拉电阻器具有不太高的阻抗。
