Other Parts Discussed in Thread: MSP430FR2111
器件型号: MSP430FR2111
感谢 E2E 论坛的所有人的帮助。
我目前正在开发一个使用 Texas Instruments MSP430FR2111 MCU 的系统。
系统大约每天向外部 PC 发送一次测量值、以 UART 作为通信方法。
我创建了端口初始化和数据传输的源代码,并试图通过 FT232RL 使用 PC 终端应用程序接收数据,但出于某种原因,当 P1.6 (RxD) 连接到 FT232RL 的 TxD,数据无法从 P1.7 (TxD) 发送。
我被这个神秘的现象困扰:如果我断开连接 P1.6 (RxD) 到 FT232RL 的 TxD,数据可以从 P1.7 (TxD) 发送。
我有多个 FT232RL、所以我尝试了几个、但每个 FT232RL 的结果相同。
我随附了当前的源代码、虽然我很抱歉在您繁忙的日程安排期间打扰您、但如果您能告诉我如何解决问题、我将不胜感激。
提前感谢您。
#include <msp430.h>
#include <stdint.h>
#pragma DATA_SECTION(accumulated_distance, ".myFRAM")
volatile uint32_t accumulated_distance;
#pragma DATA_SECTION(magic_flag, ".myFRAM")
volatile uint32_t magic_flag;
#define MAGIC_INITIALIZED 0xFFFFFFF0 // 2025.12.03
#define SMCLK_FREQ_HZ 1000000UL // 2025.12.09
#define UART_BRW_VALUE 104
#define UART_MCTLW_VALUE (UCOS16 | (2 << 4) | (0 << 8))
volatile uint8_t inc_flag = 0;
__interrupt void Port_1(void);
void uart_putc(char c);
void uart_puts(const char *s);
#define MCLK_FREQ_MHZ 1 // MCLK = 1MHz
int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
SYSCFG0 = FRWPPW; //
__bis_SR_register(SCG0); // Disable FLL
CSCTL3 = SELREF__REFOCLK; // Set REFO as FLL reference source
CSCTL1 = DCOFTRIMEN_0 | DCORSEL_0; // DCO Range = 1MHz
CSCTL2 = FLLD_0 + 30; // DCODIV = 1MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // Enable FLL
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
// default DCODIV as MCLK and SMCLK source
//
// P1.0 / A0
P1SEL0 |= BIT0; P1SEL1 |= BIT0;
// P1.1 / A1
P1DIR |= BIT1;
// P1.3 / A3
P1SEL0 &= ~BIT3; P1SEL1 &= ~BIT3; //
P1DIR &= ~BIT3; //
P1IES |= BIT3; //
P1IFG &= ~BIT3; //
P1IE |= BIT3; //
// P1.4 / A4
P1SEL0 &= ~BIT4; P1SEL1 &= ~BIT4; //
P1DIR |= BIT4; //
P1OUT &= ~BIT4; //
// P1.5 / A5
P1SEL0 &= ~BIT5; P1SEL1 &= ~BIT5; //
P1DIR |= BIT5; //
P1OUT &= ~BIT5; //
// P2.0
P2SEL0 &= ~BIT0; P2SEL1 &= ~BIT0; //
P2DIR |= BIT0; //
P2OUT |= BIT0; //
// P2.1
P2SEL0 &= ~BIT1; P2SEL1 &= ~BIT1; //
P2DIR &= ~BIT1; //
// UART
// P1.6 = UCA0RXD, P1.7 = UCA0TXD
// 1) stop eUSCI_A
//----------------------------------------------------------
// (1) RXD (P1.6)
//----------------------------------------------------------
P1DIR &= ~BIT6; // RXD input
P1OUT |= BIT6; // pull-up
P1REN |= BIT6; // enable pull-up
//
__delay_cycles(200000); // 200ms @1MHz
//----------------------------------------------------------
// (2) Function change
//----------------------------------------------------------
P1REN &= ~BIT6; //
P1SEL0 |= BIT6 | BIT7; //
P1SEL1 &= ~(BIT6 | BIT7);
//----------------------------------------------------------
// (3) DIR
//----------------------------------------------------------
P1DIR &= ~BIT6; //
P1DIR |= BIT7; //
//----------------------------------------------------------
// (4)
//----------------------------------------------------------
UCA0CTLW0 = UCSWRST; //
UCA0CTLW0 |= UCSSEL__SMCLK; // SMCLK = 1MHz
// 9600bps @ 1MHz
UCA0BR0 = 104;
UCA0BR1 = 0;
UCA0MCTLW = 0; //
UCA0CTLW0 &= ~UCSWRST; // UART start
// UCA0IE |= UCRXIE; //
// ADC
ADCCTL0 &= ~ADCENC; //
ADCCTL1 |= ADCSHP | ADCSSEL_2; //
ADCCTL2 |= ADCRES_2; //
ADCMCTL0 |= ADCINCH_0; //
ADCCTL0 |= ADCON; //
ADCIE |= ADCIE0; //
PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
// Check if this is first-ever run
if (magic_flag != MAGIC_INITIALIZED){
accumulated_distance = 0; // Initialize on first run only
magic_flag = MAGIC_INITIALIZED;
}
__delay_cycles(500000);
// Example
uart_puts("U");
while(1) //
{
__low_power_mode_3(); //
//
if (inc_flag){
accumulated_distance++;
inc_flag = 0;
}
}
}
void uart_putc(char c) {
while (! (UCA0IFG & UCTXIFG)); //
UCA0TXBUF = c; // send
}
void uart_puts(const char *s){
while (*s){
uart_putc(*s++);
}
}
// Port 1.x interrupt service routine
#pragma vector=PORT1_VECTOR
__interrupt void Port_1(void)
{
if (P1IFG & BIT3){ //
inc_flag = 1; //
P1IFG &= ~BIT3; //
__bic_SR_register_on_exit(LPM3_bits);
}
}