所有跳线均已连接。 当我 向PC发送字符时工作正常,但当我尝试从PC接收字符时,中断不会释放。 我使用了德州仪器(TI)的原始代码,使用UCA0, 从 “桥接”接头(J101)上卸下了RXD/TXD跳线,并将WFP 2.0 (J101) 1.8 插针安装到TXD上,将WFP 2.1 (RTOD)插针安装到RXD上,将2.19 (RTOD)插针安装到RXD上,遇到同样的问题。 我可以从launchpad发送字符,但从PC接收(中断不启动)。 有什么想法吗?
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For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP430FR69xx Demo - eUSCI_A0 UART echo at 9600 baud using BRCLK = 8MHz // // Description: This demo echoes back characters received via a PC serial port. // SMCLK/ DCO is used as a clock source and the device is put in LPM3 // The auto-clock enable feature is used by the eUSCI and SMCLK is turned off // when the UART is idle and turned on when a receive edge is detected. // Note that level shifter hardware is needed to shift between RS232 and MSP // voltage levels. // // The example code shows proper initialization of registers // and interrupts to receive and transmit data. // To test code in LPM3, disconnect the debugger. // // ACLK = VLO, MCLK = DCO = SMCLK = 8MHz // // MSP430FR6989 // ----------------- // RST -| P2.0/UCA0TXD|----> PC (echo) // | | // | | // | P2.1/UCA0RXD|<---- PC // | | // // William Goh // Texas Instruments Inc. // April 2014 // Built with IAR Embedded Workbench V5.60 & Code Composer Studio V6.0 //****************************************************************************** // modified by: Peter Spevak // // last change: April 7th 2020 // // 04/07/2020 changing the UART to eUSCIA1, as this is the UART for // backchannel on virtual COM port to PC // //***************************************************************************** #include <msp430.h> int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop Watchdog // Configure GPIO //P2SEL0 |= BIT0 | BIT1; // USCI_A0 UART operation // 04/07/2020 //P2SEL1 &= ~(BIT0 | BIT1); // 04/07/2020 P3SEL0 |= BIT4 + BIT5; // eUSCI_A1 UART // 04/07/2020 P3SEL1 &= ~(BIT4 + BIT5); // eUSCI_A1 UART // 04/07/2020 // Disable the GPIO power-on default high-impedance mode to activate // previously configured port settings PM5CTL0 &= ~LOCKLPM5; // Startup clock system with max DCO setting ~8MHz CSCTL0_H = CSKEY >> 8; // Unlock clock registers CSCTL1 = DCOFSEL_3 | DCORSEL; // Set DCO to 8MHz CSCTL2 = SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK; CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers CSCTL0_H = 0; // Lock CS registers // Configure USCI_A0 for UART mode /*UCA0CTLW0 = UCSWRST; // Put eUSCI in reset // 04/07/2020 UCA0CTLW0 |= UCSSEL__SMCLK; // CLK = SMCLK // Baud Rate calculation // 8000000/(16*9600) = 52.083 // Fractional portion = 0.083 // User's Guide Table 21-4: UCBRSx = 0x04 // UCBRFx = int ( (52.083-52)*16) = 1 UCA0BR0 = 52; // 8000000/16/9600 UCA0BR1 = 0x00; UCA0MCTLW |= UCOS16 | UCBRF_1 | 0x4900; UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt */ // Configure USCI_A1 for UART mode UCA1CTLW0 = UCSWRST; // Put eUSCI in reset // 04/07/2020 UCA1CTLW0 |= UCSSEL__SMCLK; // CLK = SMCLK // 04/07/2020 // Baud Rate calculation // 8000000/(16*9600) = 52.083 // Fractional portion = 0.083 // User's Guide Table 21-4: UCBRSx = 0x04 // UCBRFx = int ( (52.083-52)*16) = 1 UCA1BR0 = 52; // 8000000/16/9600 // 04/07/2020 UCA1BR1 = 0x00; // 04/07/2020 UCA1MCTLW |= UCOS16 | UCBRF_1 | 0x4900; // 04/07/2020 UCA1CTLW0 &= ~UCSWRST; // Initialize eUSCI // 04/07/2020 UCA1IE |= UCRXIE; // Enable USCI_A0 RX interrupt // 04/07/2020 __bis_SR_register(LPM3_bits | GIE); // Enter LPM3, interrupts enabled __no_operation(); // For debugger } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=USCI_A0_VECTOR __interrupt void USCI_A0_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(UCA0IV, USCI_UART_UCTXCPTIFG)) { case USCI_NONE: break; case USCI_UART_UCRXIFG: while(!(UCA0IFG&UCTXIFG)); UCA0TXBUF = UCA0RXBUF; __no_operation(); break; case USCI_UART_UCTXIFG: break; case USCI_UART_UCSTTIFG: break; case USCI_UART_UCTXCPTIFG: break; } } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) // 04/07/2020 #pragma vector=USCI_A1_VECTOR __interrupt void USCI_A1_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_A1_VECTOR))) USCI_A1_ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(UCA1IV, USCI_UART_UCTXCPTIFG)) { case USCI_NONE: break; case USCI_UART_UCRXIFG: while(!(UCA1IFG&UCTXIFG)); UCA1TXBUF = UCA1RXBUF; __no_operation(); break; case USCI_UART_UCTXIFG: break; case USCI_UART_UCSTTIFG: break; case USCI_UART_UCTXCPTIFG: break; } }