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器件型号:MSP-EXP430FR5994 您好!
在 DMA_VALUE 中、接收到的字节的顺序仍然存在问题。 当 BQ 芯片请求一个字节时、在开始 DMA 传输前清零 RXIFG 会有所帮助。 现在、我从 BQ 芯片请求了2个字节、找到最后一个 CRC 字节回绕到字节0位置、其余字节位于位置1-7。 如何纠正这种情况? 我添加了在 CCS IDE 中看到的 DMA_VALUE 字节和在逻辑分析器字节中看到的正确响应。
for(channel=0; channel<(ACTIVECHANNELS*2); channel+=2)
{
ReadReg(0x00, cellStartAddr+channel, response_frame, 2, 0, FRMWRT_STK_R);
while (dmaDataReady == 0);
boardByteStart = 8*currentBoard;
rawData = (uint16_t) ((response_frame[boardByteStart+4] << 8) | (response_frame[boardByteStart+5]));
dmaDataReady = 0;
rawDataSign = twosComplementToDecimal(rawData);
cellVoltage[cellvolIndex-1][currentBoard] = cellVoltageScaleFactorMult(rawDataSign);
cellvolIndex--;
}
void DMA_Init(){
__data20_write_long((uintptr_t)&BQUART_DMASA, (uintptr_t)&BQUART_RXBUF);
__data20_write_long((uintptr_t)&BQUART_DMADA, (uintptr_t) dma_value);
BQUART_DMACTL &= ~DMAEN;
DMACTL0 |= BQUART_DMA_RX_TRIGGER;
DMACTL4 |= DMARMWDIS;
//Repeated single transfer; increment destination address; source address unchanged;
//byte to byte transfer source to DMA; byte to byte transfer destination to DMA;
//rising edge DMA trigger; DMA enable
BQUART_DMACTL |= DMADT_4|DMADSTINCR_3|DMASRCINCR_0|DMASRCBYTE__WORD|DMADSTBYTE__WORD|DMA_TRIGGER_RISINGEDGE|DMAEN;
}
void uartSend(int length, uint8_t * data){
uint8_t i;
uint8_t zeros[(8)*TOTALBOARDS] = {0};
BQUART_DMASZ = uartRxLen;
dmaDataReady = 0;
memcpy(dma_value, zeros, uartRxLen);
BQUART_IFG &= ~UCRXIFG;
BQUART_DMACTL |= DMAEN;
BQUART_DMACTL |= DMAIE;
for (i = 0; i < length; i++){
while (!(BQUART_IFG & UCTXIFG));
BQUART_TXBUF = data[i];
}
}
void uartReceive(void){
uint8_t i;
if (startMeasure == 1){
for (i = 0; i < uartRxLen; i++){
response_frame[i] = (uint8_t) dma_value[i];
}
dmaDataReady = 1;
}
if (bqAddr == 1){
for (i = 0; i < uartRxLen; i++){
autoaddr_response_frame[i] = (uint8_t) dma_value[i];
}
bq79600Addr = autoaddr_response_frame[4];
bqAddr = 0;
startMeasure = 1;
}
}
#pragma vector=DMA_VECTOR
__interrupt void dmaIsrHandler(void)
{
switch(__even_in_range(DMAIV, BQUART_DMAIV_IFG))
{
case BQUART_DMAIV_IFG:
BQUART_DMACTL &= ~DMAIE;
uartReceive();
// Exit low power mode on wake-up
__bic_SR_register_on_exit(LPM4_bits);
break;
case DMAIV_DMA0IFG:
break;
case DMAIV_DMA2IFG:
break;
case DMAIV_DMA3IFG:
break;
case DMAIV_DMA4IFG:
break;
case DMAIV_DMA5IFG:
break;
default: break;
}
}