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如何在以下代码中更改采样时间?
boolEUSCI_A_UART_init (uint16_t baseAddress、
EUSCI_A_UART_initParam *参数)
{
bool RetVal = STATUS_SUCCESS;
//禁用 USCI 模块
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= UCSWRST;
//时钟源选择
HWREG16 (baseAddress + OFS_UCAxCTLW0)&=~UCSSEL_3;
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= param->selectClockSource;
//MSB、LSB 选择
HWREG16 (baseAddress + OFS_UCAxCTLW0)&&~UCMSB;
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= param->msborLsbFirst;
//UCSPB = 0 (1个停止位)或1 (2个停止位)
HWREG16 (baseAddress + OFS_UCAxCTLW0)&&~UCSPB;
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= param->numberofStopBits;
//奇偶校验
switch (param->parity)
{
案例 EUSCI_A_UART_NO_奇 偶校验:
//无奇偶校验
HWREG16 (baseAddress + OFS_UCAxCTLW0)&&~UCPEN;
中断;
案例 EUSCI_A_UART_ODD 奇偶校验:
//奇偶校验
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= UCPEN;
HWREG16 (baseAddress + OFS_UCAxCTLW0)&&~Ω UCPAR;
中断;
案例 EUSCI_A_UART_evo_parity:
//偶校验
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= UCPEN;
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= UCPAR;
中断;
}
//波特率控制寄存器
HWREG16 (baseAddress + OFS_UCAxBRW)= param->clockPrescalar;
//调制控制寄存器
HWREG16 (baseAddress + OFS_UCAxMCTLW)=((param->secondModReg << 8)
+(param->firstModReg <<
4)+ param->oversaming);
//异步模式和8位字符选择和清除模式
HWREG16 (baseAddress + OFS_UCAxCTLW0)&=~(UCSYNC +
UC7BIT +
UCMODE_3
);
//配置字符长度:
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= param->bitLength;
//配置 UART 模式。
HWREG16 (baseAddress + OFS_UCAxCTLW0)|= param->uartMode;
//复位 UCRXIE、UCBRKIE、UCDORM、UCTXADDR、UCTXBRK
HWREG16 (baseAddress + OFS_UCAxCTLW0)&=~(UCRXEIE + UCBRKIE + UCDORM +
UCTXADDR + UCTXBRK
);
返回(RetVal);
}