在我之前的帖子中、msp430fr4133的 eUSCI 无法使用 aclk、因此建议我通过调整来设置 smclk 值。(smclk = 1MHz、BRW = 833)
我制作了1MHz smclk 并设置了1200波特率 UART、但传输无法正常工作... (我想在 msp430fr4133上以1200波特率进行 UART 通信)
下面是我设置的整个代码。
(我通过仅更改 initUART 和 initClockTo16mHz 中的设置值来创建 initUART_1200()和 initClockTo1MHz。 逻辑的其余部分与基准电压相同。
#include <msp430.h>
//******************************************************************************
// UART Initialization *********************************************************
//******************************************************************************
#define LED_OUT P1OUT
#define LED_DIR P1DIR
#define LED_PIN BIT2
#define SMCLK_115200 0
#define SMCLK_9600 1
#define UART_MODE SMCLK_115200//SMCLK_9600//
void initUART()
{
// Configure USCI_A0 for UART mode
UCA0CTLW0 |= UCSWRST; // Put eUSCI in reset
#if UART_MODE == SMCLK_115200
UCA0CTLW0 |= UCSSEL__SMCLK; // CLK = SMCLK
// Baud Rate Setting
// Use Table 21-5
UCA0BRW = 8;
UCA0MCTLW |= UCOS16 | UCBRF_10 | 0xF700; //0xF700 is UCBRSx = 0xF7
#elif UART_MODE == SMCLK_9600
UCA0CTLW0 |= UCSSEL__SMCLK; // CLK = SMCLK
// Baud Rate Setting
// Use Table 21-5
UCA0BRW = 104;
UCA0MCTLW |= UCOS16 | UCBRF_2 | 0xD600; //0xD600 is UCBRSx = 0xD6
#else
# error "Please specify baud rate to 115200 or 9600"
#endif
UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
}
void initUART_1200()
{
// Configure USCI_A0 for UART mode
UCA0CTLW0 |= UCSWRST;
UCA0CTLW0 |= UCSSEL__SMCLK;
UCA0BRW = 52;
UCA0MCTLW |= UCOS16 | UCBRF_1 | 0x4900;
UCA0CTLW0 &= ~UCSWRST;
UCA0IE |= UCRXIE;
}
//******************************************************************************
// Device Initialization *******************************************************
//******************************************************************************
void initGPIO()
{
LED_DIR |= LED_PIN;
LED_OUT &= ~LED_PIN;
// USCI_A0 UART operation
P1SEL0 |= BIT0 | BIT1;
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
}
void initClockTo16MHz()
{
// Configure one FRAM waitstate as required by the device datasheet for MCLK
// operation beyond 8MHz _before_ configuring the clock system.
FRCTL0 = FRCTLPW | NWAITS_1;
__bis_SR_register(SCG0); // disable FLL
CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_5; // Set DCO = 16MHz
CSCTL2 = FLLD_0 + 487; // set to fDCOCLKDIV = (FLLN + 1)*(fFLLREFCLK/n)
// = (487 + 1)*(32.768 kHz/1)
// = 16 MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // enable FLL
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // FLL locked
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;
}
void initClockTo1MHz()
{
// Configure one FRAM waitstate as required by the device datasheet for MCLK
// operation beyond 8MHz _before_ configuring the clock system.
FRCTL0 = FRCTLPW | NWAITS_1;
__bis_SR_register(SCG0); // disable FLL
CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_0; // Set DCO = 1MHz
CSCTL2 = FLLD_0 + 30; // set to fDCOCLKDIV = (FLLN + 1)*(fFLLREFCLK/n)
// = (487 + 1)*(32.768 kHz/1)
// = 16 MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // enable FLL
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // FLL locked
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;
}
//******************************************************************************
// Main ************************************************************************
// Enters LPM0 if SMCLK is used and waits for UART interrupts. If ACLK is used *
// then the device will enter LPM3 mode instead. The UART RX interrupt handles *
// the received character and echoes it. *
//******************************************************************************
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop Watchdog
initGPIO();
//initClockTo16MHz();
//initUART();
initClockTo1MHz();
initUART_1200();
#if UART_MODE == SMCLK_9600
__bis_SR_register(LPM0_bits + GIE); // Since ACLK is source, enter LPM0, interrupts enabled
#else
__bis_SR_register(LPM0_bits + GIE); // Since SMCLK is source, enter LPM0, interrupts enabled
#endif
__no_operation(); // For debugger
}
//******************************************************************************
// UART Interrupt ***********************************************************
//******************************************************************************
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(UCA0IV, USCI_UART_UCTXCPTIFG))
{
case USCI_NONE: break;
case USCI_UART_UCRXIFG:
while(!(UCA0IFG&UCTXIFG));
UCA0TXBUF = UCA0RXBUF;
__no_operation();
break;
case USCI_UART_UCTXIFG: break;
case USCI_UART_UCSTTIFG: break;
case USCI_UART_UCTXCPTIFG: break;
}
}
是否有任何错误或部件缺失? 或者是否还有其他需要更改的内容?