[参考译文] MSP430FR2355：msp430fr2355.h 中的 SPI 时钟极性和相位定义不一致

https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/1323741/msp430fr2355-spi-clock-polarity-and-phase-defines-are-inconsistent-in-msp430fr2355-h

您好、MSP430团队：

我正在使用项目中包含的 msp430fr2355.h。

我注意到 msp430fr2355.h 定义了不一致的 SPI 时钟相位和极性。

有关定义 UCCKPL_H、UCCKPL_1_H、UCCKPL__HIGH_H 和 UCCKPH_H、UCCKPH_1_H  右移8位。

如果是特意为目的进行的、请告诉我。 在"h"文件中添加注释也会有所帮助。

#define UCCKPL                           (0x4000)        /* Clock polarity select */
#define UCCKPL_H                         (0x0040)
#define UCCKPL_0                         (0x0000)        /* The inactive state is low */
#define UCCKPL_1                         (0x4000)        /* The inactive state is high */
#define UCCKPL_1_H                       (0x0040)
#define UCCKPL__LOW                      (0x0000)        /* The inactive state is low */
#define UCCKPL__HIGH                     (0x4000)        /* The inactive state is high */
#define UCCKPL__HIGH_H                   (0x0040)
#define UCCKPH                           (0x8000)        /* Clock phase select */
#define UCCKPH_H                         (0x0080)
#define UCCKPH_0                         (0x0000)        /* Data is changed on the first UCLK edge and captured on the 
                                                            following edge. */
#define UCCKPH_1                         (0x8000)        /* Data is captured on the first UCLK edge and changed on the 
                                                            following edge. */
#define UCCKPH_1_H                       (0x0080)