[参考译文] SK-AM62P-LP：在 SD 卡引导模式下未生成 ESM 中断

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https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1468161/sk-am62p-lp-esm-interrupt-not-generating-in-sd-card-boot-mode

器件型号：SK-AM62P-LP

工具与软件：

专家、您好！

我将 AM62P-LP EVM 与 Debian Trixe 版本10.00 SDK 和相同版本的 MCU+SDK 配合使用。

我将 DCC 示例代码作为参考、并实施了一个 SDL 应用程序、以验证来自不同 DCC 实例的大约12个时钟。此应用在有和没有错误注入的情况下都可以在 OSPI 引导模式下正常运行(我运行了应用程序并看到了控制台输出)。但是、当我切换到 SD 卡引导模式并通过创建指向路径的符号链接来刷写 R5内核时/lib/firmware/am62p-mcu-r5f0_0-fw、不会在错误注入模式下生成中断。当我mcu_dcc在 SD 卡引导模式下尝试相同的操作时、电路板会自动复位。

下面是 DCC 配置阵列和 ESM 配置的代码片段。

static DCC_TEST_UseCase DCC_Test_UseCaseArray[DCC_UC1_TOTAL_USECASES_NUM] =
{
    /* Continuous - error generated */
    {
        "HFOSC0",
        "EMMC/PLL0_HSDIV5",
        SDL_DCC_INST_DCC1,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 25 MHz for HFOSC0 */
        SDL_DCC_CLK1_SRC_CLOCKSRC0,
        200000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0xffff,
        IS_ERR
    },
    /* Single Shot - No error */
    {
        "HFOSC0",
        "ETHERNET/PLL0_HSDIV6",
        SDL_DCC_INST_DCC1,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 25 MHz for HFOSC0 */
        SDL_DCC_CLK1_SRC_CLOCKSRC1,
        200000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0xFFFF,
        IS_ERR
    },
    /* Continuous - no error */
    {
        "HFOSC0",
        "UART/PLL1_HSDIV1",
        SDL_DCC_INST_DCC1,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 25MHz for HFOSC0 */
        SDL_DCC_CLK1_SRC_CLOCKSRC3,
        160000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0x0,
        IS_ERR
    },
    /* Single Shot - No error */
    {
        "RC OSC",
        "WKUPR5/PLL15_HSDIV2",
        SDL_DCC_INST_DCC1,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 12.5 MHz for RC OSC */
        SDL_DCC_CLK1_SRC_CLOCKSRC4,
        200000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0xFFFF,
        IS_ERR
    },
    /* Continuous - error generated */
    {
        "RC OSC",
        "UART,I2C/PLL1_HSDIV0",
        SDL_DCC_INST_DCC1,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 12.5 MHz for RC OSC */
        SDL_DCC_CLK1_SRC_CLOCKSRC5,
        192000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0x0,
        IS_ERR
    },
    {
        "RC OSC",
        "ECC,PH/PLL15_HSDIV0",
        SDL_DCC_INST_DCC2,
        SDL_DCC_CLK0_SRC_CLOCK0_0,DCC_Test_UseCaseArray
        25000, /* 12.5 MHz for RC OSC */
        SDL_DCC_CLK1_SRC_CLOCKSRC1,
        400000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0xFFFF,
        IS_ERR
    },
    /* Continuous - no error */
    {
        "RC OSC",
        "ALLPLL/PLL15_HSDIV1",
        SDL_DCC_INST_DCC2,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 12.5 MHz for RC OSC */
        SDL_DCC_CLK1_SRC_CLOCKSRC5,
        400000, /* 200 MHz for SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0xFFFF,
        IS_ERR
    },

     /* Continuous - error generated */
    {
        "HFOSC0",
        "ETHERNET2/PLL2_HSDIV0",
        SDL_DCC_INST_DCC5,
        SDL_DCC_CLK0_SRC_CLOCK0_0,
        25000, /* 25 MHz for HSOSC0 */
        SDL_DCC_CLK1_SRC_CLOCKSRC2,
        250000, /* 500 MHz for MAIN_SYSCLK0 */
        SDL_DCC_MODE_CONTINUOUS,
        0x0,
        0xFFFF,
        IS_ERR
    },
     {
         "HFOSC0",
         "MCU_SPI (0/1) /MCUPLL0_HSDIV6",
          SDL_DCC_INST_MCU_DCC1,
          SDL_DCC_CLK0_SRC_CLOCK0_0,
          25000, /* 25 MHz for HFOSC0 */
          SDL_DCC_CLK1_SRC_CLOCKSRC1,
          400000, /* 400 MHz for SYSCLK0 */
          SDL_DCC_MODE_CONTINUOUS,
          0x0,
          0xffff,
          IS_ERR
        }
    {
     "HFOSC0",
     "DDR4/PLL0_HSDIV5",
     SDL_DCC_INST_DCC1,
     SDL_DCC_CLK0_SRC_CLOCK0_0,
     25000, /* 25 MHz for HFOSC0 */
     SDL_DCC_CLK1_SRC_CLOCKSRC7,
     0, /* 200 MHz for SYSCLK0 */
     SDL_DCC_MODE_CONTINUOUS,
     0x0,
     0xffff,
     IS_ERR
    },
    {
     "HFOSC0",
     "MSRAM/PLL0_HSDIV5",
     SDL_DCC_INST_MCU_DCC0,
     SDL_DCC_CLK0_SRC_CLOCK0_0,
     25000, /* 25 MHz for HFOSC0 */
     SDL_DCC_CLK1_SRC_CLOCKSRC0,
     400000, /* 400 MHz for SYSCLK0 */
     SDL_DCC_MODE_CONTINUOUS,
     0x0,
     0xffff,
     IS_ERR
    },
    {
     "HFOSC0",
     "MCU_ECC_AGRRE0/PLL0_HSDIV5",
     SDL_DCC_INST_MCU_DCC0,
     SDL_DCC_CLK0_SRC_CLOCK0_0,
     25000, /* 25 MHz for HFOSC0 */
     SDL_DCC_CLK1_SRC_CLOCKSRC3,
     200000, /* 400 MHz for SYSCLK0 */
     SDL_DCC_MODE_CONTINUOUS,
     0x0,
     0xffff,
     IS_ERR
    }
};

SDL_ESM_config DCC_Test_esmInitConfig_Inst =
{

     /**< All high priority events to error pin */
//        .esmErrorConfig = {1u, 8u}, /* Self test error config */
//    .enableBitmap = {0x00000000u, 0x00000007bu, 0x00000000u, 0x00003000u,
//                 0x00000000u, 0x00000380u,
//
//                },
//     /**< All events enable: except clkstop events for unused clocks
//      *   and PCIE events */
//    .priorityBitmap = {0x00000000u, 0x00000007bu, 0x0000000u, 0x00003000u,
//                 0x00000000u, 0x00000380u,
//
//                        },
//    /**< All events high priority: except clkstop events for unused clocks
//     *   and PCIE events */
//    .errorpinBitmap = {0x00000000u, 0x00000007bu, 0x00000000u, 0x00003000u,
//                 0x00000000u, 0x00000380u,
//
//                      },
    /**< All events high priority: except clkstop for unused clocks
     *   and PCIE events */
 .esmErrorConfig = {1u, 8u}, /* Self test error config */
     .enableBitmap = {0x00000380u, 0xfffffffbu, 0x7fffffffu, 0xffffffffu,
                  0xffffffffu, 0xffffffffu, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u,0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                 },
      /**< All events enable: except clkstop events for unused clocks
       *   and PCIE events */
     .priorityBitmap = {0x00000380u, 0xfffffffbu, 0x7fffffffu, 0xffffffffu,
                  0xffffffffu, 0xffffffffu, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u,0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                         },
     /**< All events high priority: except clkstop events for unused clocks
      *   and PCIE events */
     .errorpinBitmap = {0x00000380u, 0xfffffffbu, 0x7fffffffu, 0xffffffffu,
                  0xffffffffu, 0xffffffffu, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u,0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                  0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u,
                       },
     /**< All events high priority: except clkstop for unused clocks
      *   and PCIE events */


};
SDL_ESM_config DCC_Test_esmInitConfig_Main =
{


  /**< All high priority events to error pin */
        .esmErrorConfig = {1u, 8u}, /* Self test error config */
    .enableBitmap = {0x00000000u,  0xfffffffbu, 0x7fffffffu, 0xffffffffu,
                     0xffffffffu, 0xffffffffu,

                },
     /**< All events enable: except clkstop events for unused clocks
      *   and PCIE events */
    .priorityBitmap = {0x00000000u,  0xfffffffbu, 0x7fffffffu, 0xffffffffu,
                       0xffffffffu, 0xffffffffu,
                        },
    /**< All events high priority: except clkstop events for unused clocks
     *   and PCIE events */
    .errorpinBitmap = {0x00000000u,  0xfffffffbu, 0x7fffffffu, 0xffffffffu,
                       0xffffffffu, 0xffffffffu,

                      },
    /**< All events high priority: except clkstop for unused clocks
     *   and PCIE events */


 };

9 个月前

0 admin 9 个月前

TI__Guru**** 2468460 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

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[参考译文] SK-AM62P-LP：在 SD 卡引导模式下未生成 ESM 中断