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器件型号:J722SXH01EVM 工具/软件:
您好 e2e:
我看到`tools/spi/spidev_test.c` mcspi 上的报告传输速率约为8mbps (1M 字节/秒)。
是否与预期数量有关? 请提出建议。
在由跳线连接的测试 MISO-MOSI 环中。
j722s-evm-kkonaka:~/spidev_test$ ./spidev_test -D /dev/spidev3.0 -s 50000000 -I 7000 -S 4096 spi mode: 0x0 bits per word: 8 max speed: 50000000 Hz (50000 kHz) rate: tx 7399.0kbps, rx 7399.0kbps rate: tx 7903.6kbps, rx 7903.6kbps rate: tx 7910.2kbps, rx 7910.2kbps rate: tx 7903.6kbps, rx 7903.6kbps rate: tx 7910.2kbps, rx 7910.2kbps total: tx 28000.0KB, rx 28000.0KB j722s-evm-kkonaka:~/spidev_test$ ./spidev_test -D /dev/spidev1.0 -s 50000000 -I 7000 -S 4096 spi mode: 0x0 bits per word: 8 max speed: 50000000 Hz (50000 kHz) rate: tx 7058.2kbps, rx 7058.2kbps rate: tx 7831.6kbps, rx 7831.6kbps rate: tx 7844.7kbps, rx 7844.7kbps rate: tx 7844.7kbps, rx 7844.7kbps rate: tx 7838.1kbps, rx 7838.1kbps total: tx 28000.0KB, rx 28000.0KB j722s-evm-kkonaka:~/spidev_test$ j722s-evm-kkonaka:~/spidev_test$ sudo find /sys/devices/platform -name "*spidev*0" /sys/devices/platform/bus@f0000/20100000.spi/spi_slave/spi2/spi2.0/spidev/spidev2.0 /sys/devices/platform/bus@f0000/20120000.spi/spi_master/spi3/spi3.0/spidev/spidev3.0 /sys/devices/platform/bus@f0000/bus@f0000:bus@4000000/4b00000.spi/spi_master/spi1/spi1.0/spidev/spidev1.0 j722s-evm-kkonaka:~/spidev_test$ j722s-evm-kkonaka:~/spidev_test$ sudo find /sys/devices/platform -name "spi[0123]" /sys/devices/platform/bus@f0000/fc00000.bus/fc40000.spi/spi_master/spi0 /sys/devices/platform/bus@f0000/20100000.spi/spi_slave/spi2 /sys/devices/platform/bus@f0000/20120000.spi/spi_master/spi3 /sys/devices/platform/bus@f0000/bus@f0000:bus@4000000/4b00000.spi/spi_master/spi1 j722s-evm-kkonaka:~/spidev_test$ j722s-evm-kkonaka:~/spidev_test$ dtc -I fs -O dts /proc/device-tree 2>/dev/null| grep =.*/spi@|sort main_spi0 = "/bus@f0000/spi@20100000"; main_spi1 = "/bus@f0000/spi@20110000"; main_spi2 = "/bus@f0000/spi@20120000"; mcu_spi0 = "/bus@f0000/bus@4000000/spi@4b00000"; mcu_spi1 = "/bus@f0000/bus@4000000/spi@4b10000"; ospi0 = "/bus@f0000/bus@fc00000/spi@fc40000"; ospi0_nand = "/bus@f0000/bus@fc00000/spi@fc40000/nand@0"; ospi0_nor = "/bus@f0000/bus@fc00000/spi@fc40000/flash@0"; j722s-evm-kkonaka:~/spidev_test$
内核配置 diff:
$ git diff ac935f637d6559a87f39230d3344cb275129ad47 -- kernel/configs/ti_arm64_prune.config diff --git a/kernel/configs/ti_arm64_prune.config b/kernel/configs/ti_arm64_prune.config index fbdb3225671e..4aa5d6e8dd06 100644 --- a/kernel/configs/ti_arm64_prune.config +++ b/kernel/configs/ti_arm64_prune.config @@ -492,3 +492,11 @@ CONFIG_DVB_TDA665x=n CONFIG_DVB_DRX39XYJ=n CONFIG_DVB_CXD2099=n CONFIG_DVB_SP2=n +CONFIG_DYNAMIC_DEBUG=y +CONFIG_I2C_DEBUG_CORE=y +CONFIG_I2C_DEBUG_ALGO=y +CONFIG_I2C_DEBUG_BUS=y +CONFIG_DEBUG_DRIVER=y +CONFIG_TEST_DYNAMIC_DEBUG=y +CONFIG_SPI_SPIDEV=y +CONFIG_SPI_OMAP24XX=y $
器件树叠加层:
// SPDX-License-Identifier: GPL-2.0 /* * see software-dl.ti.com/.../SPI.html */ /dts-v1/; /plugin/; #include <dt-bindings/gpio/gpio.h> #include "k3-pinctrl.h" // mcu_spi0 = "/bus@f0000/bus@4000000/spi@4b00000"; // mcu_spi1 = "/bus@f0000/bus@4000000/spi@4b10000"; // main_spi0 = "/bus@f0000/spi@20100000"; // main_spi1 = "/bus@f0000/spi@20110000"; // main_spi2 = "/bus@f0000/spi@20120000"; /* * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/ */ &{/chosen} { overlays { k3-j722s-evm-spidev.kernel = __TIMESTAMP__; }; }; &main_pmx0 { main_spi2_pins_default: main-spi2-pins-default { // F24 SPI2_CLK IO SPI Clock // C27 SPI2_CS0 IO SPI Chip Select 0 // D25 SPI2_CS1 IO SPI Chip Select 1 // B25 SPI2_CS2 IO SPI Chip Select 2 // C26 SPI2_CS3 IO SPI Chip Select 3 // A25 SPI2_D0 IO SPI Data 0 // A26 SPI2_D1 IO SPI Data 1 pinctrl-single,pins = < J722S_IOPAD(0x01b0, PIN_OUTPUT, 1) /* (F24) SPI2_CLK IO SPI Clock */ J722S_IOPAD(0x0194, PIN_INPUT, 1) /* (A25) SPI2_D0 IO SPI Data 0 */ J722S_IOPAD(0x0198, PIN_OUTPUT, 1) /* (A26) SPI2_D1 IO SPI Data 1 */ J722S_IOPAD(0x01ac, PIN_OUTPUT, 1) /* (C27) SPI2_CS0 IO SPI Chip Select 0 */ >; }; main_spi0_pins_default: main-spi0-pins-default { // D20 SPI0_CLK IO SPI Clock // B20 SPI0_CS0 IO SPI Chip Select 0 // C20 SPI0_CS1 IO SPI Chip Select 1 // E22 SPI0_CS2 IO SPI Chip Select 2 // B21 SPI0_CS3 IO SPI Chip Select 3 // E19 SPI0_D0 IO SPI Data 0 E19 // E20 SPI0_D1 IO SPI Data 1 E20 pinctrl-single,pins = < J722S_IOPAD(0x01bc, PIN_INPUT, 0) /* (D20) SPI0_CLK IO SPI Clock */ J722S_IOPAD(0x01c0, PIN_INPUT, 0) /* (E19) SPI0_D0 IO SPI Data 0 */ J722S_IOPAD(0x01c4, PIN_INPUT, 0) /* (E20) SPI0_D1 IO SPI Data 1 */ J722S_IOPAD(0x01b4, PIN_INPUT, 0) /* (B20) SPI0_CS0 IO SPI Chip Select 0 */ >; }; }; // enable only spi2 and spi0. spi1 is not well arranged on TI evaluation board. &main_spi2 { status = "okay"; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&main_spi2_pins_default>; pinctrl-names = "default"; spidev@0 { spi-max-frequency = <24000000>; reg = <0>; compatible = "rohm,dh2228fv"; }; }; &main_spi0 { status = "okay"; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&main_spi0_pins_default>; pinctrl-names = "default"; spi-slave; slave@0 { spi-max-frequency = <24000000>; reg = <0>; compatible = "rohm,dh2228fv"; }; }; &mcu_pmx0 { mcu_spi0_pins_default: mcu-spi0-pins-default { // A9 MCU_SPI0_CLK IO SPI Clock // C12 MCU_SPI0_CS0 IO SPI Chip Select 0 // A10 MCU_SPI0_CS2 IO SPI Chip Select 2 // B12 MCU_SPI0_D0 IO SPI Data 0 // C11 MCU_SPI0_D1 IO SPI Data 1 pinctrl-single,pins = < J722S_MCU_IOPAD(0x0008, PIN_INPUT, 0) /* (A9) MCU_SPI0_CLK IO SPI Clock */ J722S_MCU_IOPAD(0x000c, PIN_INPUT, 0) /* (B12) MCU_SPI0_D0 IO SPI Data 0 */ J722S_MCU_IOPAD(0x0010, PIN_INPUT, 0) /* (C11) MCU_SPI0_D1 IO SPI Data 1 */ J722S_MCU_IOPAD(0x0000, PIN_INPUT, 0) /* (C12) MCU_SPI0_CS0 IO SPI Chip Select 0 */ >; }; }; &mcu_spi0 { status = "okay"; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&mcu_spi0_pins_default>; pinctrl-names = "default"; spidev@0 { spi-max-frequency = <24000000>; reg = <0>; compatible = "rohm,dh2228fv"; }; };
TI SDK;SDK-LINUX-edgeai 10_01_00_04
