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https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1526506/faq-tda4vl-q1-enabling-and-testing-inline-ecc-for-ddr
工具/软件：
如何在 DDR 的内联 ECC 上启用和执行 single-bit 和 double-bit 错误注入？
您好、
请按照以下补丁来启用并在 J721S2 的 DDRSS0 和 DDRSS1 的内联 ECC 上注入一位和双位错误。
e2e.ti.com/.../8037.0001_2D00_J721S2_2D00_Enabling_2D00_and_2D00_Testing_2D00_inline_2D00_ECC_2D00_on_2D00_DDR.txt
该补丁已在 SDK 11.0 上进行了测试。 请使用下面提到的步骤应用补丁-
cd $RTOS_SDK/ Git 初始化 Git add。 git commit -m “init commit“ Git am $path_to_patch_shared_below
以下是已启用并已准备好 ECC 的存储器范围：
#define DDR_ECC_START_ADDR (0x80000000) #define DDR_ECC_END_ADDR (0x90000000) #define DDR_ECC_START_ADDR1 (0x90000000) #define DDR_ECC_END_ADDR1 (0xA0000000) #define DDR_ECC_START_ADDR2 (0xA0000000) #define DDR_ECC_END_ADDR2 (0xB0000000)
有关内联 ECC 的更多详细信息，请参阅以下用户指南 — https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j721s2/latest/exports/docs/psdk_rtos/docs/user_guide/developer_notes_ddr_inline_ecc.html
此致、
Josiitaa
