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[参考译文] PROCESSOR-SDK-AM437X:如何将 u-boot 配置为支持 AM437x SDK 中 16 位宽度的 NAND 闪存

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Other Parts Discussed in Thread: TPS65218

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1541139/processor-sdk-am437x-how-to-config-u-boot-to-support-16-bit-width-nand-flash-in-am437x-sdk

器件型号:PROCESSOR-SDK-AM437X
主题:TPS65218 中讨论的其他器件

工具/软件:

您好、

长期以来、我们一直在使用带有 NAND 的 AM437X 电路板卡作为 MTD 系统。 最近,我们的目标是缩短系统的启动时间,所以我们将原来的 512x8 位 NAND (8 位宽度,S34ML04G200TFI000) 替换为 256x16 位(16 位宽度)NAND(MT29F4G16ABADAWP),希望能增加位宽以提高读写速度。

我们通过串行端口 (xmodem) 编译并将 u-boot-spl.bin 下载到主板上:

正在传输 u-boot-spl.bin...

 100%    123 KB   9 KB/s 00:00:13      0 错误

但是、当我们将 u-boot.img 下载到电路板时、发生了错误:

OMAP-ELM:不可纠正的 ECC 错误

正在传输 u-boot.img...

 100%    595 KB   3KB/s 00:02:29      0 错误

xyzModem - CRC mode、4769 (SOH)/0 (STX)/0 (CAN) packets、4 retries

加载了 610096 个字节

U-Boot 2018.01-00444-ge782a78-Dirty (2025 年 7 月 16 日 — 10:43:05 +0800)

CPU :AM437X-CPU GP 修订版 1.2

型号:TI AM437x GP EVM

DRAM: 1 GiB

PMIC: TPS65218

NAND: 512 MIB

MMC  :OMAP SD/MMC:0

OMAP-elm:不可纠正的 ECC 错误

OMAP-elm:不可纠正的 ECC 错误

…μ s

SDK 为 ti-SDK-RT-AM437X-EVM-05.03.00.07。  

我们在 u-boot 中配置:

1Am43xx_evm_defconfig:CONFIG_SYS_NAND_BUSWIDTH_16BIT=y

2) 在 AM437X-gp-evm.dts 中、添加了:NAND_FLASH_x8:

0x20 (PIN_INPUT | MUX_MODE0)/* GPMC_AD0.GPMC_AD8 **/

0x24 (PIN_INPUT | MUX_MODE0)/* GPMC_AD1.GPMC_AD9 **

0x28 (PIN_INPUT | MUX_MODE0)/* GPMC_AD2.GPMC_AD10 */

0x2C (PIN_INPUT | MUX_MODE0)/* GPMC_AD3.GPMC_AD11 **

0x30 (PIN_INPUT | MUX_MODE0)/* GPMC_AD4.GPMC_AD12 **

0x34 (PIN_INPUT | MUX_MODE0)/* GPMC_AD5.GPMC_AD13 **

0x38 (PIN_INPUT | MUX_MODE0)/* GPMC_AD6.GPMC_AD14 **

0x3C (PIN_INPUT | MUX_MODE0)/* GPMC_AD7.GPMC_AD15 **

同时、将 nand-bus-width=<8>更改为<16>:

&GPMC{

 状态=“正常“;

 pinctrl-names =“default";“;

 pinctrl-0 =<&nand_flash_x8>;

 范围=<0 0 00x010000000>;/*最小 GPMC 分区= 16MB */

 NAND@0、0{

 reg =<0 0 4>;//*器件 IO 寄存器*/

 TI、nand-ecc-opt =“bch16";“;

 TI、elm-id =<&elm>;

 NAND 总线宽度=<16>;//<8>;

 GPMC、器件宽度=<1>;

…μ s

 

 

 

是否还有其他需要配置或更改的内容?

 

最好的注意!

Dudechao

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    从 NAND (MT29F4G16ABADAWP) 数据表中、我无法知道如何在 am43xx_evm.h 中定义以下定义:

      /* NAND 支持*/
    #ifdef CONFIG_NAND
    /* NAND:与设备相关的配置*/
    #define CONFIG_SYS_NAND_PAGE_SIZE 2048
    #define CONFIG_SYS_NAND_OOBSIZE 64 //128
    #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
    #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE /\
    CONFIG_SYS_NAND_PAGE_SIZE)
    #define CONFIG_SYS_NAND_5_ADDR_CYCLE
    /* NAND:与驱动程序相关的配置*/
    #define CONFIG_SYS_NAND_ONFI_Detection
    #define CONFIG_NAND_OMAP_ECCSCHEME OMAP-LECC_BCH16_code_HW
    #define CONFIG_SYS_NAND_BAD_BAD_BLOCK_POS NAND_LARGE_BATBLOCK_POS
    #define CONFIG_SYS_NAND_ECCPOS{2、3、4、5、6、 7、8、9、\
    10、11、12、13、14、 15、16、17、18、19、 \
    20、21、22、23、24、 25、26、27、28、29、 \
    30、31、32、33、34、 35、36、37、38、39、 \
    40、41、42、43、44、 45、46、47、48、49、 \
    50、51、52、53、54、 55、56、57、58、59、 \
    60、61、62、63、64、 65、66、67、68、69、 \
    70、71、72、73、74、 75、76、77、78、79、 \
    80、81、82、83、84、 85、86、87、88、89、 \
    90、91、92、93、94、 95、96、97、98、99、 \
    100,101,102,103、104、 105、\
    }
    #define CONFIG_SYS_NAND_ECCSIZE 512
    #define CONFIG_SYS_NAND_ECCBYTES 26
    #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
    /* NAND:SPL 相关配置*/e2e.ti.com/.../MT29F8G08ADADAH4D.PDF
    /* NAND:SPL falcon 模式配置*/
    #ifdef CONFIG_SPL_OS_BOOT
    #define CONFIG_SYS_NAND_SPL_NEL_OFFS 0x00300000 /*内核偏移*/
    #endif

    有人可以来看一下吗? 非常感谢! 附件是我们的数据表。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    根据随附的 nand 数据表、“页大小 x8:2112 字节(2048 + 64 字节)“
    =>应选择 BCH8 而不是 BCH16
    https://www.kernel.org/doc/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
    我们有 AM335x GP EVM、其中包含“页面大小:2048、OOB 大小:64“的 NAND 器件
    我建议参考 AM335x EVM 的 GPMC-n 和配置文件、例如、从开始
    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/configs/am335x_evm_defconfig?h=11.01.05
    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/include/configs/am335x_evm.h?h=11.01.05
    ...
    此致、
    - Hong

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    Hong、

    感谢您的答复!
    根据您提供的信息、我们调整了以下文件中与 NAND 配置相关的参数:
    1) 已在 AM437X_EVM.h 中进行了修改:
    #define CONFIG_SYS_NAND_PAGE_SIZE 2048
    #define CONFIG_SYS_NAND_OOBSIZE 64
    #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
    #define CONFIG_SYS_NAND_ECCPOS{2、3、4、5、6、 7、8、9、\
    10、11、12、13、14、 15、16、17、\
    18、19、20、21、22、 23、24、25、\
    26、27、28、29、30、 31、32、33、\
    34、35、36、37、38、 39、40、41、\
    42、43、44、45、46、 47、48、49、\
    50、51、52、53、54、 55、56、57、}
    #define CONFIG_SYS_NAND_ECCSIZE 512
    #define CONFIG_SYS_NAND_ECCBYTES 14

    /* NAND support */
    #ifdef CONFIG_NAND
    /* NAND: device related configs */
    #define CONFIG_SYS_NAND_PAGE_SIZE	2048
    #define CONFIG_SYS_NAND_OOBSIZE		64 //128
    #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
    #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
    					 CONFIG_SYS_NAND_PAGE_SIZE)
    #define CONFIG_SYS_NAND_5_ADDR_CYCLE
    /* NAND: driver related configs */
    #define CONFIG_SYS_NAND_ONFI_DETECTION
    #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
    #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
    #define CONFIG_SYS_NAND_ECCPOS	{ 2, 3, 4, 5, 6, 7, 8, 9, \
    					 10, 11, 12, 13, 14, 15, 16, 17, \
    					 18, 19, 20, 21, 22, 23, 24, 25, \
    					 26, 27, 28, 29, 30, 31, 32, 33, \
    					 34, 35, 36, 37, 38, 39, 40, 41, \
    					 42, 43, 44, 45, 46, 47, 48, 49, \
    					 50, 51, 52, 53, 54, 55, 56, 57, }
    #define CONFIG_SYS_NAND_ECCSIZE		512
    #define CONFIG_SYS_NAND_ECCBYTES	14 //26
    #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00180000
    /* NAND: SPL related configs */
    /* NAND: SPL falcon mode configs */
    #ifdef CONFIG_SPL_OS_BOOT
    #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00300000 /* kernel offset */
    #endif
    #define NANDARGS \
    	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
    	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
    	"nandargs=setenv bootargs console=${console} " \
    		"${optargs} " \
    		"root=${nandroot} " \
    		"rootfstype=${nandrootfstype}\0" \
    	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
    	"nandrootfstype=ubifs rootwait=1\0" \
    	"nandboot=echo Booting from nand ...; " \
    		"run nandargs; " \
    		"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
    		"nand read ${loadaddr} NAND.kernel; " \
    		"bootz ${loadaddr} - ${fdtaddr}\0"
    #define NANDBOOT			"run nandboot; "
    #else /* !CONFIG_NAND */
    #define NANDARGS
    #define NANDBOOT
    #endif /* CONFIG_NAND */

    2) 在 AM437X-gp-evm.dts 中修改以下内容:
    &GPMC{
    状态=“正常“;
    pinctrl-names =“default";“;
    pinctrl-0 =<&nand_flash_x8>;
    范围=<0 0 00x010000000>;/*最小 GPMC 分区= 16MB */
    NAND@0、0{
    reg =<0 0 4>;//*器件 IO 寄存器*/
    TI、nand-ecc-opt =“bch8";“;//“bch16";“;
    TI、elm-id =<&elm>;
    NAND 总线宽度=<16>;//<8>;
    GPMC、器件宽度=<1>;
    …μ s


    &elm {
    	status = "okay";
    };
    
    &gpmc {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&nand_flash_x8>;
    	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
    	nand@0,0 {
    		reg = <0 0 4>;		/* device IO registers */
    		ti,nand-ecc-opt ="bch8";// "bch16";
    		ti,elm-id = <&elm>;
    		nand-bus-width = <16>; //<8>;
    		gpmc,device-width = <1>;
    		gpmc,sync-clk-ps = <0>;
    		gpmc,cs-on-ns = <0>;
    		gpmc,cs-rd-off-ns = <40>;
    		gpmc,cs-wr-off-ns = <40>;
    		gpmc,adv-on-ns = <0>;
    		gpmc,adv-rd-off-ns = <25>;
    		gpmc,adv-wr-off-ns = <25>;
    		gpmc,we-on-ns = <0>;
    		gpmc,we-off-ns = <20>;
    		gpmc,oe-on-ns = <3>;
    		gpmc,oe-off-ns = <30>;
    		gpmc,access-ns = <30>;
    		gpmc,rd-cycle-ns = <40>;
    		gpmc,wr-cycle-ns = <40>;
    		gpmc,wait-pin = <0>;
    		gpmc,bus-turnaround-ns = <0>;
    		gpmc,cycle2cycle-delay-ns = <0>;
    		gpmc,clk-activation-ns = <0>;
    		gpmc,wait-monitoring-ns = <0>;
    		gpmc,wr-access-ns = <40>;
    		gpmc,wr-data-mux-bus-ns = <0>;
    		/* MTD partition table */
    		/* All SPL-* partitions are sized to minimal length
    		 * which can be independently programmable. For
    		 * NAND flash this is equal to size of erase-block */
    		#address-cells = <1>;
    		#size-cells = <1>;
    		partition@0 {
    			label = "NAND.SPL";
    			reg = <0x00000000 0x00040000>;
    		};
    		partition@1 {
    			label = "NAND.SPL.backup1";
    			reg = <0x00040000 0x00040000>;
    		};
    		partition@2 {
    			label = "NAND.SPL.backup2";
    			reg = <0x00080000 0x00040000>;
    		};
    		partition@3 {
    			label = "NAND.SPL.backup3";
    			reg = <0x000c0000 0x00040000>;
    		};
    		partition@4 {
    			label = "NAND.u-boot-spl-os";
    			reg = <0x00100000 0x00080000>;
    		};
    		partition@5 {
    			label = "NAND.u-boot";
    			reg = <0x00180000 0x00100000>;
    		};
    		partition@6 {
    			label = "NAND.u-boot-env";
    			reg = <0x00280000 0x00040000>;
    		};
    		partition@7 {
    			label = "NAND.u-boot-env.backup1";
    			reg = <0x002c0000 0x00040000>;
    		};
    		partition@8 {
    			label = "NAND.kernel";
    			reg = <0x00300000 0x00700000>;
    		};
    		partition@9 {
    			label = "NAND.file-system";
    			reg = <0x00a00000 0x1f600000>;
    		};
    	};
    };
    
    &dss {
    	status = "ok";
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&dss_pins>;
    
    	port {
    		dpi_out: endpoint@0 {
    			remote-endpoint = <&lcd_in>;
    			data-lines = <24>;
    		};
    	};
    };
    
    &dcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dcan0_default>;
    	status = "okay";
    };
    
    &dcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dcan1_default>;
    	status = "okay";
    };
    
    &vpfe0 {
    	status = "okay";
    	pinctrl-names = "default", "sleep";
    	pinctrl-0 = <&vpfe0_pins_default>;
    	pinctrl-1 = <&vpfe0_pins_sleep>;
    
    	port {
    		vpfe0_ep: endpoint {
    			remote-endpoint = <&ov2659_1>;
    			ti,am437x-vpfe-interface = <0>;
    			bus-width = <8>;
    			hsync-active = <0>;
    			vsync-active = <0>;
    		};
    	};
    };
    

    3)μ A am43xx_evm_defconfig 为:μ A

    CONFIG_ARM=y
    CONFIG_ARCH_OMAP2PLUS=y
    CONFIG_TI_COMMON_CMD_OPTIONS=y
    CONFIG_SYS_MALLOC_F_LEN=0x2000
    CONFIG_AM43XX=y
    CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
    CONFIG_SPL_LOAD_FIT=y
    CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
    CONFIG_SYS_CONSOLE_INFO_QUIET=y
    CONFIG_VERSION_VARIABLE=y
    CONFIG_SPL=y
    CONFIG_SPL_ETH_SUPPORT=y
    CONFIG_SPL_MTD_SUPPORT=y
    CONFIG_SPL_NET_SUPPORT=y
    CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
    CONFIG_SPL_OS_BOOT=y
    CONFIG_SPL_USB_GADGET_SUPPORT=y
    CONFIG_SPL_USBETH_SUPPORT=y
    CONFIG_HUSH_PARSER=y
    CONFIG_CMD_SPL=y
    CONFIG_CMD_SPL_NAND_OFS=0x00100000
    CONFIG_CMD_SPL_WRITE_SIZE=0x40000
    # CONFIG_CMD_FLASH is not set
    CONFIG_CMD_NAND=y
    # CONFIG_CMD_SETEXPR is not set
    CONFIG_CMD_MTDPARTS=y
    CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
    CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)"
    CONFIG_ISO_PARTITION=y
    CONFIG_OF_CONTROL=y
    CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
    CONFIG_ENV_IS_IN_NAND=y
    CONFIG_DM=y
    # CONFIG_BLK is not set
    CONFIG_DFU_MMC=y
    CONFIG_DFU_RAM=y
    CONFIG_DFU_SF=y
    CONFIG_DM_GPIO=y
    CONFIG_DM_MMC=y
    CONFIG_MMC_OMAP_HS=y
    CONFIG_NAND=y
    CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
    CONFIG_SPI_FLASH=y
    CONFIG_SPI_FLASH_MACRONIX=y
    CONFIG_PHYLIB=y
    # CONFIG_DM_ETH is not set
    CONFIG_NETDEVICES=y
    CONFIG_PHY_GIGE=y
    CONFIG_DM_SERIAL=y
    CONFIG_SYS_NS16550=y
    CONFIG_TI_QSPI=y
    CONFIG_TIMER=y
    CONFIG_OMAP_TIMER=y
    CONFIG_USB=y
    CONFIG_USB_XHCI_HCD=y
    CONFIG_USB_XHCI_DWC3=y
    CONFIG_USB_DWC3=y
    CONFIG_USB_DWC3_GADGET=y
    CONFIG_USB_DWC3_OMAP=y
    CONFIG_USB_DWC3_PHY_OMAP=y
    CONFIG_USB_STORAGE=y
    CONFIG_USB_GADGET=y
    CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
    CONFIG_USB_GADGET_VENDOR_NUM=0x0403
    CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
    CONFIG_USB_GADGET_DOWNLOAD=y
    CONFIG_USB_ETHER=y
    

    其他定义与原始 8 位宽度 NAND 的定义相同。  

    我们编译:1) make cross_compile=arm-linux-gnueabihf- am43xx_evm_config
    2)make cross_compile=arm-linux-gnueabihf--J4
    通过串行端口下载生成的 u-boot.img 后、我在读取和写入 NAND 时仍然遇到相同的错误“OMAP-Lelm:不可纠正的 ECC 错误“。
    您能帮助我们发现任何潜在的问题吗? 非常感谢您的帮助!

    最好的考虑!

    Dudechao

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    Hong、

    您好!
    我根据您在 DTS 中推荐的信息修改了 NAND 读取和写入时序。 重新编译和下载后、发生了不足的 OOB 错误:
    U-Boot 2018.01-00444-ge782a78-Dirty (2025 年 7 月 18 日 — 13:32:33 +0800)
    CPU:AM437X-CPU GP 修订版 1.2
    型号:TI AM437x GP EVM
    DRAM:1 GiB
    PMIC:TPS65218
    NAND:NAND:错误:OOB 不足:需要=106
    0 Mib
    MMC:OMAP SD/MMC:0
    ***错误 — 找不到有效的环境区域
    ***警告 — 环境区域错误,使用默认环境
    以上信息仅供您参考!
    谢谢你。

    修改后的 AM437X-gp-evm.dts

          GPMC、sync-clk-ps =<0>;
          GPMC、cs-on-ns =<0>;
          GPMC、cs-rd-off-ns =<44>;
          GPMC、CS-wr-off-ns =<44>;
          GPMC、高通 ns =<6>;
          GPMC、高级关断 ns =<34>;
          GPMC、高级关断 ns =<44>;
          GPMC、we-off-ns =<40>;
          GPMC、oe-off-ns =<54>;
          GPMC、access-ns =<64>;
          GPMC、rd-cycle-ns =<82>;
          GPMC、wr 周期 ns =<82>;
          GPMC、wr 访问-ns =<40>;
          GPMC、wr-data mux-bus-ns =<0>;

    &gpmc {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&nand_flash_x8>;
    	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
    	nand@0,0 {
    		reg = <0 0 4>;		/* device IO registers */
    		ti,nand-ecc-opt ="bch8";// "bch16";
    		ti,elm-id = <&elm>;
    		nand-bus-width = <16>; 
    		gpmc,device-width = <1>;
    		
    				
    		gpmc,wait-pin = <0>;
    
    			gpmc,sync-clk-ps = <0>;
    			gpmc,cs-on-ns = <0>;
    			gpmc,cs-rd-off-ns = <44>;
    			gpmc,cs-wr-off-ns = <44>;
    			gpmc,adv-on-ns = <6>;
    			gpmc,adv-rd-off-ns = <34>;
    			gpmc,adv-wr-off-ns = <44>;
    			gpmc,we-off-ns = <40>;
    			gpmc,oe-off-ns = <54>;
    			gpmc,access-ns = <64>;
    			gpmc,rd-cycle-ns = <82>;
    			gpmc,wr-cycle-ns = <82>;
    			gpmc,wr-access-ns = <40>;
    			gpmc,wr-data-mux-bus-ns = <0>;
    		
    		/* MTD partition table */
    		/* All SPL-* partitions are sized to minimal length
    		 * which can be independently programmable. For
    		 * NAND flash this is equal to size of erase-block */
    		#address-cells = <1>;
    		#size-cells = <1>;
    		partition@0 {
    			label = "NAND.SPL";
    			reg = <0x00000000 0x00040000>;
    		};
    		partition@1 {
    			label = "NAND.SPL.backup1";
    			reg = <0x00040000 0x00040000>;
    		};
    		partition@2 {
    			label = "NAND.SPL.backup2";
    			reg = <0x00080000 0x00040000>;
    		};
    		partition@3 {
    			label = "NAND.SPL.backup3";
    			reg = <0x000c0000 0x00040000>;
    		};
    		partition@4 {
    			label = "NAND.u-boot-spl-os";
    			reg = <0x00100000 0x00080000>;
    		};
    		partition@5 {
    			label = "NAND.u-boot";
    			reg = <0x00180000 0x00100000>;
    		};
    		partition@6 {
    			label = "NAND.u-boot-env";
    			reg = <0x00280000 0x00040000>;
    		};
    		partition@7 {
    			label = "NAND.u-boot-env.backup1";
    			reg = <0x002c0000 0x00040000>;
    		};
    		partition@8 {
    			label = "NAND.kernel";
    			reg = <0x00300000 0x00700000>;
    		};
    		partition@9 {
    			label = "NAND.file-system";
    			reg = <0x00a00000 0x1f600000>;
    		};
    	};
    };
    
    &dss {
    	status = "ok";
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&dss_pins>;
    
    	port {
    		dpi_out: endpoint@0 {
    			remote-endpoint = <&lcd_in>;
    			data-lines = <24>;
    		};
    	};
    };
    
    &dcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dcan0_default>;
    	status = "okay";
    };
    
    &dcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dcan1_default>;
    	status = "okay";
    };
    
    &vpfe0 {
    	status = "okay";
    	pinctrl-names = "default", "sleep";
    	pinctrl-0 = <&vpfe0_pins_default>;
    	pinctrl-1 = <&vpfe0_pins_sleep>;
    
    	port {
    		vpfe0_ep: endpoint {
    			remote-endpoint = <&ov2659_1>;
    			ti,am437x-vpfe-interface = <0>;
    			bus-width = <8>;
    			hsync-active = <0>;
    			vsync-active = <0>;
    		};
    	};
    };
    &gpmc {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&nand_flash_x8>;
    	ranges = <0 0 0 0x01000000>;	/* minimum GPMC partition = 16MB */
    	nand@0,0 {
    		reg = <0 0 4>;		/* device IO registers */
    		ti,nand-ecc-opt ="bch8";// "bch16";
    		ti,elm-id = <&elm>;
    		nand-bus-width = <16>; 
    		gpmc,device-width = <1>;
    		
    				
    		gpmc,wait-pin = <0>;
    
    			gpmc,sync-clk-ps = <0>;
    			gpmc,cs-on-ns = <0>;
    			gpmc,cs-rd-off-ns = <44>;
    			gpmc,cs-wr-off-ns = <44>;
    			gpmc,adv-on-ns = <6>;
    			gpmc,adv-rd-off-ns = <34>;
    			gpmc,adv-wr-off-ns = <44>;
    			gpmc,we-off-ns = <40>;
    			gpmc,oe-off-ns = <54>;
    			gpmc,access-ns = <64>;
    			gpmc,rd-cycle-ns = <82>;
    			gpmc,wr-cycle-ns = <82>;
    			gpmc,wr-access-ns = <40>;
    			gpmc,wr-data-mux-bus-ns = <0>;
    		
    		/* MTD partition table */
    		/* All SPL-* partitions are sized to minimal length
    		 * which can be independently programmable. For
    		 * NAND flash this is equal to size of erase-block */
    		#address-cells = <1>;
    		#size-cells = <1>;
    		partition@0 {
    			label = "NAND.SPL";
    			reg = <0x00000000 0x00040000>;
    		};
    		partition@1 {
    			label = "NAND.SPL.backup1";
    			reg = <0x00040000 0x00040000>;
    		};
    		partition@2 {
    			label = "NAND.SPL.backup2";
    			reg = <0x00080000 0x00040000>;
    		};
    		partition@3 {
    			label = "NAND.SPL.backup3";
    			reg = <0x000c0000 0x00040000>;
    		};
    		partition@4 {
    			label = "NAND.u-boot-spl-os";
    			reg = <0x00100000 0x00080000>;
    		};
    		partition@5 {
    			label = "NAND.u-boot";
    			reg = <0x00180000 0x00100000>;
    		};
    		partition@6 {
    			label = "NAND.u-boot-env";
    			reg = <0x00280000 0x00040000>;
    		};
    		partition@7 {
    			label = "NAND.u-boot-env.backup1";
    			reg = <0x002c0000 0x00040000>;
    		};
    		partition@8 {
    			label = "NAND.kernel";
    			reg = <0x00300000 0x00700000>;
    		};
    		partition@9 {
    			label = "NAND.file-system";
    			reg = <0x00a00000 0x1f600000>;
    		};
    	};
    };
    
    &dss {
    	status = "ok";
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&dss_pins>;
    
    	port {
    		dpi_out: endpoint@0 {
    			remote-endpoint = <&lcd_in>;
    			data-lines = <24>;
    		};
    	};
    };
    
    &dcan0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dcan0_default>;
    	status = "okay";
    };
    
    &dcan1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&dcan1_default>;
    	status = "okay";
    };
    
    &vpfe0 {
    	status = "okay";
    	pinctrl-names = "default", "sleep";
    	pinctrl-0 = <&vpfe0_pins_default>;
    	pinctrl-1 = <&vpfe0_pins_sleep>;
    
    	port {
    		vpfe0_ep: endpoint {
    			remote-endpoint = <&ov2659_1>;
    			ti,am437x-vpfe-interface = <0>;
    			bus-width = <8>;
    			hsync-active = <0>;
    			vsync-active = <0>;
    		};
    	};
    };

    最好的考虑

    Dudechao

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。
    NAND:NAND:错误:OOB 不足:需要=106

    该错误很可能是由于 BCH 方案与 OOB 大小不正确所致
    昨天我在你的答复中发现了一个错误。
    >>>>
    #define CONFIG_NAND_OMAP_ECCSCHEME OMAP-LECC_BCH16_code_HW
    <<<<
    我建议以 AM335x EVM GPMC-n 和配置文件作为参考、并交叉检查您的电路板修改。
    此致、
    - Hong

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    Hong、

    您好!  
    这是一个很好的问题。 非常感谢您的支持!

    谢谢!

    Dudechao